Cirrus Logic CS43L22 - Manual (Page 46)

46 DS792F2
CS43L22
Confidential Draft
3/4/10
7.12.5 Speaker MONO Control
Configures a parallel full bridge output for the speaker channels.
7.12.6 Speaker Mute 50/50 Control
Configures how the speaker channels mute.
7.13 Passthrough x Volume: PASSAVOL (Address 14h) & PASSBVOL (Address 15h)
7.13.1 Passthrough x Volume
Sets the volume/gain of the analog input signal routed to the headphone/line output.
Notes:
1. This register is ignored when the PASSTHRUx bit ( “Passthrough Analog” on page 44 ) is disabled.
2. The step size may deviate from 0.5 dB at settings below -40 dB. Code settings 0x95, 0xA1, 0xAD and
0xB9 are not guaranteed to be monotonic.
SPKMONO Parallel Full Bridge Output
0 Disabled
1 Enabled
Application: “Mono Speaker Output Configuration” on page 27
MUTE50/50 Speaker Mute 50/50
0 Disabled; The PWM amplifiers outputs modulated silence when SPKxMUTE is enabled.
1
Enabled; The PWM amplifiers switch at an exact 50%-duty-cycle signal (not modulated) when SPKxMUTE is
enabled.
7 6 5 4 3 2 1 0
PASSxVOL7 PASSxVOL6 PASSxVOL5 PASSxVOL4 PASSxVOL3 PASSxVOL2 PASSxVOL1 PASSxVOL0
PASSxVOL[7:0] Gain
0111 1111 12 dB
... ...
0001 1000 12 dB
... ...
0000 0001 +0.5 dB
0000 0000 0 dB
11111 1111 -0.5 dB
... ...
1000 1000 -60.0 dB
... ...
1000 0000 -60.0 dB
Step Size: 0.5 dB (approximate)
Application: “Passthrough Analog” on page 44