Cirrus Logic CDB4244 - Manual (Page 5)

DS900DB2 5
CDB4244
1.5 CS8416 Digital Audio Receiver
The CS8416 S/PDIF receiver ( Figure 11 on page 24 ) converts the incoming S/PDIF data stream from the
optical or RCA connectors into digital audio (I²S or Left-Justified serial interface formats) and passes it to
the CS4244. Using the master clock recovered from the incoming S/PDIF stream or the clock provided by
the socketed onboard oscillator, the CS8416 can master the serial audio interface timing for the CDB4244.
The CS8416 can be controlled using the Cirrus Logic FlexGUI software under the “Board Control” tab. See
Section 2.1 on page 8 for details. A complete description of the CS8416 and a discussion of the digital audio
interface can be found in the CS8416 data sheet.
1.6 CS2000 Fractional-N Clock Synthesizer & Clock Multiplier
The CS2000 clock synthesizer ( Figure 11 on page 24 ) provides a low-jitter master clock source for the
CS4244 and CS8406, and is capable of generating the necessary master clock frequencies to provide mul-
tiple sample rates without having to make hardware changes to the board. The Cirrus Logic FlexGUI soft-
ware can be used to easily realize many of the clocking options available for the CDB4244.
Refer to Section 3 on page 13 for a detailed explanation of how the CS2000 can be used with the CDB4244.
A complete description of the CS2000 can be found in the CS2000 data sheet.
1.7 Oscillator
The socketed onboard oscillator ( Figure 11 on page 24 ) can serve as the master clock for the CDB4244
when the CS8416 can no longer recover a master clock from the incoming S/PDIF stream. Refer to Section
3.1 on page 13 for more information. The oscillator is mounted in pin sockets, allowing easy removal or re-
placement. The CDB4244 can accommodate +5-V half-can oscillators.
1.8 External Connection Headers
The CDB4244 has been designed to allow connections to and from an external system through a DSP
header (J2 in
Figure 10 on page 23 ) and a control port header (J1 in Figure 10 on page 23 ). The DSP header
provides access to the serial audio signals required to interface with an external system. The control port
header provides bidirectional access to the I²C control port signals. Two unpopulated pull-up resistors (R165
and R166) are also available in the event that the external host does not have pull-up resistors on its I²C
lines.
These headers are accessed by removing the jumpers from the “Jumper for Bd Control” position labeled on
the board. The user may then connect a ribbon cable connector to the “Ext Control Connection” pins for
external control of the CDB4244. A single row of “GND” pins are provided to maintain signal ground integrity.
If the headers are not in use, the jumpers must be in place for each row of J1 and J2 in the “Jumper for Bd
Control” position. In this configuration, the CDB4244 assumes full control of the CS4244, with access
through the PC USB connection.
Note that the CS4244 INT pin defaults to an active-low, open-drain interrupt output. The CDB4244 does not
have a pull-up resistor to pull the interrupt signal high once it is deasserted by the CS4244. Instead, the in-
terrupt signal is pulled high by a pull-up resistor internal to the onboard microcontroller. If the CDB4244 is
controlled externally (through the use of J1), the external system must be able to pull the interrupt signal
high if the CS4244 INT pin remains in its default open-drain configuration. Alternatively, the INT pin may be
configured as active high or active low, avoiding the need for a pull-up resistor in this case. Refer to the
CS4244 data sheet for more information.
To pass digital audio data from the ADCs of the CS4244 directly to the DACs in order to evaluate analog-
in-to-analog-out performance, remove the jumpers from the SDOUT1, SDIN1, SDOUT2, and SDIN2 rows
of the DSP header (J2). Then jumper SDOUT1 to SDIN1, and SDOUT2 to SDIN2 using the middle column
of the DSP header.