Asus NCCH-DR User Manual
Page 85
A S U S N C C H - D R
A S U S N C C H - D R
A S U S N C C H - D R
A S U S N C C H - D R
A S U S N C C H - D R
4 - 2 3
4 - 2 3
4 - 2 3
4 - 2 3
4 - 2 3
The items CAS Latency Time, Active to Precharge Delay, DRAM RAS# to
CAS# Delay, and DRAM RAS# Precharge are configurable only when the
Memory Timing Selectable item is set to [Manual].
4.4.3
4.4.3
4.4.3
4.4.3
4.4.3
Memory Configuration
Memory Configuration
Memory Configuration
Memory Configuration
Memory Configuration
This menu shows the memory configuration settings. Select an item then
press
DRAM Frequency
[Auto]
Memory Timing Selectable
[By SPD]
Cache Latency Time
3
Active to Precharge Delay
8
DRAM RAS# to CAS# Delay
4
DRAM RAS# Precharge
4
Memory Parity Check
Disabled
Memory Configuration
Select Menu
Item Specific Help
Set DRAM Frequency.
DRAM Frequency [Auto]
DRAM Frequency [Auto]
DRAM Frequency [Auto]
DRAM Frequency [Auto]
DRAM Frequency [Auto]
This item sets the DRAM operating frequency.
Configuration options: [DDR266] [DDR320] [DDR400] [Auto]
Memory Timing Selectable [By SPD]
Memory Timing Selectable [By SPD]
Memory Timing Selectable [By SPD]
Memory Timing Selectable [By SPD]
Memory Timing Selectable [By SPD]
The DRAM clock are set according to the DRAM SPD (Serial Presence
Detect). Select [By SPD] for automatic DRAM clock detection. Select
[Manual] to allow setting the succeeding memory items to optimal timings.
Configuration options: [Manual] [By SPD]
CAS Latency Time [2.5]
CAS Latency Time [2.5]
CAS Latency Time [2.5]
CAS Latency Time [2.5]
CAS Latency Time [2.5]
This item sets the latency (in clocks) between the DRAM read command
and the time the data actually becomes available.
Configuration options: [2] [2.5] [3]
Active to Precharge Delay [7]
Active to Precharge Delay [7]
Active to Precharge Delay [7]
Active to Precharge Delay [7]
Active to Precharge Delay [7]
This item controls the number of DRAM clocks used for DRAM parameters.
Configuration options: [8] [7] [6] [5]
DRAM RAS# to CAS# Delay [3]
DRAM RAS# to CAS# Delay [3]
DRAM RAS# to CAS# Delay [3]
DRAM RAS# to CAS# Delay [3]
DRAM RAS# to CAS# Delay [3]
Controls the latency between the DRAM active command and the read/
write command. Configuration options: [4] [3] [2]