GW Instek GDS-2000A series Quick start guide for Logic analyzer option - Manual (Page 15)

addition to the User-defined threshold
setting (TTL, 5.0V CMOS, 3.3V CMOS,
2.5V CMOS, ECL, PECL, 0V).
 Thresholds can be set for each 4 lots of
digital channels, i.e., D0~D3, D4~D7 and so
on.
5. Press Clock Edge to set the transition for the
selected clock edge, if any.
6. Press Mode to select either Auto (untriggered roll)
or Normal triggering modes.
7. Press Holdoff to set the hold off time.