GW Instek GDS-2000A series Quick start guide for Logic analyzer option - Manual (Page 13)

Parallel Bus
The digital channels can be configured as a parallel
bus. The number of bits that define the bus as well as
which bit is used as the bus clock can also be
configured.
1. Press the Bus soft-key and select Parallel.
2. Press Define Inputs to select the number of bits to
use in the parallel bus, which digital channels are
set to which bits in the parallel bus and which bit,
if any, is used for a clock signal.
3. Press Thresholds to set the thresholds.
 There are 5 pre-set threshold levels in
addition to the User-defined threshold
setting (TTL, 5.0V CMOS, 3.3V CMOS,
2.5V CMOS, ECL, PECL, 0V).
 Thresholds can be set for each 4 lots of
digital channels, i.e., D0~D3, D4~D7 and so
on.
4. Press Bus Display to configure how the data is
displayed, either hex or binary.
5. Press Event Table to view or save the decoded data
in a list.
6. Press Edit Labels to create an on-screen label for
the bus.