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Impulse PIO-48.PC104 (3701) User Manual

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PIO-48.PC104 User Manual

Interrupt Control

When enabled interrupts are generated on port bit A0 of each port (pin 47 on each
50 pin header), the port A0 must be set as an input.

X = port number

IRQENX

interrupt enable

1 = enabled

0 = disabled ( 0 on power up )

IRQCX0
IRQCX1

Interrupt mode select see table
Interrupt mode select see table

Interrupt mode select table

IRQCn1 IRQCn0 INT

Type

0 0

Low

level

0 1

High

level

1 0

Falling

edge

1 1

Rising

edge

Interrupt Read

Reading the INTSTAT port (Base+5) clears any interrupt pending.

IRQST1

(D0) Interrupt status

1 = interrupt pending, 0 = none

IRQST2

(D4) Interrupt status

1 = interrupt pending, 0 = none