Asus MAXIMUS V GENE - Manual (Page 89)

ROG MAXIMUS V GENE 3-9
Chapter 3
DRAM RAS# PRE Time [Auto]
Configuration options: [Auto] [1 DRAM Clock] – [15 DRAM Clock]
DRAM RAS# ACT Time [Auto]
Configuration options: [Auto] [1 DRAM Clock] – [255 DRAM Clock]
DRAM COMMAND Mode [Auto]
Configuration options: [Auto] [1 DRAM Clock] [2 DRAM Clock] [3 DRAM
Clock]
Secondary Timings
DRAM RAS# to RAS# Delay [Auto]
Configuration options: [Auto] [1 DRAM Clock] – [15 DRAM Clock]
DRAM REF Cycle Time [Auto]
Configuration options: [Auto] [1 DRAM Clock] – [511 DRAM Clock]
DRAM Refresh Interval [Auto]
Configuration options: [Auto] [1 DRAM Clock] – [65535 DRAM Clock]
DRAM WRITE Recovery Time [Auto]
Configuration options: [Auto] [1 DRAM Clock] – [31 DRAM Clock]
DRAM READ to PRE Time [Auto]
Configuration options: [Auto] [1 DRAM Clock] – [15 DRAM Clock]
DRAM FOUR ACT WIN Time [Auto]
Configuration options: [Auto] [1 DRAM Clock] – [63 DRAM Clock]
DRAM WRITE to READ Delay [Auto]
Configuration options: [Auto] [1 DRAM Clock] – [15 DRAM Clock]
DRAM CKE Minimum pulse width [Auto]
Configuration options: [Auto] [1 DRAM Clock] – [15 DRAM Clock]
DRAM CAS# Write Latency [Auto]
Configuration options: [Auto] [1 DRAM Clock] – [15 DRAM Clock]
DRAM RTL (CHA) [Auto]
Configuration options: [Auto] [1 DRAM Clock] – [63 DRAM Clock]
DRAM RTL (CHB) [Auto]
Configuration options: [Auto] [1 DRAM Clock] – [63 DRAM Clock]
DRAM IO-L (CHA) [Auto]
Configuration options: [Auto] [Delay 1 Clock] – [Delay 15 Clock]
DRAM IO-L (CHB) [Auto]
Configuration options: [Auto] [Delay 1 Clock] – [Delay 15 Clock]