Asus TS100-E5/PI4 - Manual (Page 77)

ASUS TS100-E5/PI4 4-21
South Bridge Configuration
SMBUS Controller [Enabled]
Allows you to enable or disable the SMBUS Controller.
Configuration options: [Enabled] [Disabled]
SLP_S4# Min. Assertion Width [1 to 2 seconds]
Allows you to select the SLP_S4# Min. Assertion Width.
Configuration options: [4 to 5 seconds] [3 to 4 seconds] [2 to 3 seconds]
[1 to 2 seconds]
DRAM RAS# to CAS# Delay [6 DRAM Clocks]
Controls the latency between the DDR SDRAM active command and the
read/write command.
Configuration options: [3 DRAM Clocks] [4 DRAM Clocks] [5 DRAM Clocks]
[6 DRAM Clocks]
DRAM RAS# Precharge [6 DRAM Clocks]
Controls the idle clocks after issuing a precharge command to the DDR
SDRAM.
Configuration options: [3 DRAM Clocks] [4 DRAM Clocks] [5 DRAM Clocks]
[6 DRAM Clocks]
DRAM RAS# Activate to Precharge Delay [15 DRAM Clocks]
Configuration options: [9 DRAM Clocks] [10 DRAM Clocks] ~ [15 DRAM
Clocks]
Initiate Graphic Adapter [PEG/PCI]
Allows you to select the graphics controller as the primary boot device.
Configuration options: [PCI/PEG] [PEG/PCI]
PEG Port Configuration
PEG Port [Auto]
Configuration options: [Auto] [Disabled]
South Bridge chipset Configuration
SMBUS Controller [Enabled]
SLP_S4# Min. Assertion Width [1 to 2 seconds]
BIOS SETUP UTILITY
Advanced
Options
Enabled
Disabled