Rainbow Electronics MAX109 - Manual (Page 13)

MAX109
8-Bit, 2.2Gsps ADC with Track/Hold Amplifier
and 1:4 Demultiplexed LVDS Outputs
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PIN NAME
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Pin Description (continued)
PIN NAME FUNCTION
A14 CLKP True/Positive Sampling Clock Input. Positive terminal for differential input configuration.
A16 CLKN
Complementary/Negative Sampling Clock Input. Negative terminal for differential input
configuration.
A13, A15, A17,
B14, B15, B16,
C14, C15, C16,
D14, D15, D16
CLKCOM 50 Ω Clock Termination Return
B20 SAMPADJ
Sampling Point Adjustment Input. Allows the user to adjust the sampling event by applying a
voltage between 0 to 2.5V to this input.
B19 DELGATE1
Timing Delay Adjustment. Coarse (MSB) adjustment for the timing between T/H amplifier and
quantizer.
C19 DELGATE0
Timing Delay Adjustment. Coarse (LSB) adjustment for the timing between T/H amplifier and
quantizer.
Y20 REFIN
Reference Voltage Input. For applications requiring improved gain performance and reference-
voltage adjustability, allows the user to utilize the REFIN input by applying a more accurate and
adjustable reference source. This input accepts an input-voltage range of 2.5V ±10%.
Y19 REFOUT Internal Reference Output. Connect to REFIN, if using the internal 2.5V bandgap reference.
V18, W18, Y18 GNDR
Bandgap Reference Ground. Ground connection for the internal bandgap reference and its
related circuitry.
M20 INP
True/Positive Analog Input Terminal. For single-ended signals, apply signal to INP and reverse-
terminate INN to GNDI with a 50
Ω resistor.
K20 INN
C om p l em entar y/N eg ati ve Anal og Inp ut Ter m i nal . For si ng l ed - end ed si g nal s, r ever se- ter m i nate IN N to
GN D I w i th a 50
Ω r esi stor and ap p l y the si g nal d i r ectl y to IN P .
W20 VOSADJ
Analog Voltage Input to Adjust the Converter Offset. This input accepts an input-voltage range of
0 to 2.5V allowing the offset to be adjusted at roughly ±10 LSB.
M4 DORP
True/Positive LVDS Data-Overrange Output Bit. This output flags over- and under-range
conditions of the data converter.
M3 DORN
Complementary/Negative LVDS Data-Overrange Output Bit. This output flags over- and under-
range conditions on the data converter.
M2 DCOP
True/Positive LVDS Data Clock Output. Synchronize user-supplied data-capture board or data-
acquisition system to this clock.
M1 DCON
Complementary/Negative LVDS Data Clock Output. Synchronize user-supplied data-capture
board or data-acquisition system to this clock.