Power-down modes – Rainbow Electronics MAX1383 User Manual

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MAX1377/MAX1379/MAX1383

Dual, 12-Bit, 1.25Msps Simultaneous-Sampling

ADCs with Serial Interface

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Single-/Dual-Output Modes (S/

In dual-output mode, conversion results from the two
channels appear on separate outputs. DOUT1 outputs
the result from channel 1 and DOUT2 outputs the result
from channel 2. Drive S/

D low to operate in dual-output

mode. For DSPs with two-buffer and two-input-stream
capability, use the dual-output mode to allow for easier
DSP software for dual streams. Two buffer locations can
be used so the streams do not need to be separated.

In single-output mode, the results from both channels
appear on DOUT1. The channel 2 conversion result fol-
lows the channel 1 conversion result (see Figure 10).
The MSB (D11) of the channel 2 conversion result
appears on DOUT1 after the 16th rising edge of SCLK.
The LSB (D0) of the channel 2 conversion result
appears on DOUT1 after the 27th rising edge of SCLK
and is ready to be clocked in on the 28th rising edge of
SCLK. DOUT2 is high-impedance when S/

D is high.

If CNVST goes high after the 28th rising edge of SCLK,
DOUT1 goes high impedance until the next conversion
is initiated (single-conversion mode). If CNVST goes
high after the 14th rising edge and before the 28th ris-
ing edge of SCLK, DOUT1 is actively driven low until

the next conversion results are ready (continuous- con-
version mode).

Note: In single-output mode, the conversion speed is
limited to 0.625Msps by the maximum SCLK.

Power-Down Modes

Partial Power-Down (PPD)

Reduce power consumption by placing the MAX1377/
MAX1379/MAX1383 in partial or full power-down mode.
Partial power-down mode is ideal for infrequent data
sampling and applications requiring fast wake-up
times. Pull CNVST high after the 3rd and before the
14th rising edge of SCLK to place the device in partial
power-down mode. This reduces the analog supply
current to 2mA. While in partial power-down mode, the
internal reference remains enabled (if REFSEL = GND).
Figure 11 shows the timing sequence to enter partial
power-down mode.

Full Power-Down Mode (FPD)

Full power-down mode is ideal for infrequent data sam-
pling and very low-supply current applications. To enter
full power-down mode, place the MAX1377/MAX1379/
MAX1383 first in partial power-down mode. Perform the

CNVST

SCLK

DOUT_

D11

D10

SINGLE CONVERSION

HIGH-Z

SCLK

DOUT_

D11

D10

CNVST

CONTINUOUS CONVERSION

CONTINUOUS-CONVERSION
SELECTION WINDOW*

*CNVST MUST GO HIGH BETWEEN THE 14TH RISING AND 16TH FALLING EDGES OF SCLK.
TO MAINTAIN CONTINUOUS CONVERSIONS, DOUT_ REMAINS LOW BETWEEN
CONVERSION RESULTS IN CONTINUOUS-CONVERSION DUAL-OUTPUT MODE.

HIGH-Z

Figure 9. Dual-Output Mode, Single and Continuous Conversions