Rainbow Electronics MAX1855 User Manual

Page 29

MAX1716/MAX1854/MAX1855

High-Speed, Adjustable, Synchronous Step-Down

Controllers with Integrated Voltage Positioning

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, REF, and CC capacitors, as well as the resis-

tive-dividers connected to FB and ILIM.

3) Keep the power traces and load connections short.

This is essential for high efficiency. The use of thick
copper PC boards (2oz vs. 1oz) can enhance full-
load efficiency by 1% or more. Correctly routing PC
board traces is a difficult task that must be
approached in terms of fractions of centimeters,
where a single m

Ω of excess trace resistance caus-

es a measurable efficiency penalty.

4) CS and PGND connections for current limiting must

be made using Kelvin sense connections to guaran-
tee the current-limit accuracy.

5) When trade-offs in trace lengths must be made, it’s

preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it’s better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-side

MOSFET or between the inductor and the output filter
capacitor.

6) Ensure the FB connection to the output is short and

direct.

7) Route high-speed switching nodes away from sensi-

tive analog areas (CC, REF, ILIM). Make all pin-strap
control input connections (SKIP, SHDN, ILIM, etc.) to
analog ground or V

rather than PGND or V

Layout Procedure

1) Place the power components first, with ground termi-

nals adjacent (low-side MOSFET source, C

, C

OUT

and D1 anode). If possible, make all these connec-
tions on the top layer with wide, copper-filled areas.

2) Mount the controller IC adjacent to the low-side

MOSFET. The DL gate trace must be short and wide,
measuring 10 to 20 squares (50mils to 100mils wide
if the MOSFET is 1 inch from the controller IC).

VIA TO V+

VIA TO LX

VIA TO FB

VIA TO
SOURCE
OF Q2

VIA TO GND
NEAR R

SENSE

VIA TO CS
AND VPS

INDUCTOR DISCHARGE PATH HAS LOW DC RESISTANCE.

ALL ANALOG GROUNDS

CONNECT TO LOCAL PLANE ONLY

NOTES: "STAR" GROUND IS USED.
D1 IS DIRECTLY ACROSS Q2.

CONNECT LOCAL ANALOG GROUND PLANE DIRECTLY TO GND FROM
THE SIDE OPPOSITE THE V

CAPACITOR GND TO AVOID V

GROUND

CURRENTS FROM FLOWING IN THE ANALOG GROUND PLANE.

MAX1717

;

BATTERY

INPUT

OUT

SENSE

GND

INPUT

GND

OUTPUT

GND

REF

OUT

Figure 10. Power-Stage PC Board Layout Example