Rainbow Electronics MAX8514 User Manual
Page 22
MAX8513/MAX8514
Wide-Input, High-Frequency, Triple-Output Supplies
with Voltage Monitor and Power-On Reset
22
______________________________________________________________________________________
To set the current limit and the current-limit foldback
thresholds, first select the foldback current-limit ratio
(P
FB
). This ratio is the foldback current limit (I
LIMIT@0V
)
divided by the current limit when V
OUT1
equals its nom-
inal regulated voltage (I
LIMIT
).
P
FB
is typically set to 0.5. To calculate the values of
R17 and R18 (in the Typical Applications Circuits), use
the following equations:
R
CS_MAX
is the maximum sensing resistance at the
high operating temperature. R
CS
can either be the
series resistance of the inductor or a discrete current-
sense resistor value. I
LIMIT
is the peak inductor current
at maximum load, which equals:
If R18 results in a negative resistance, then decrease
R
CS
. This can be done by choosing an inductor with a
lower DC resistance or a lower value discrete current-
sense resistor.
Constant Current Limit
For constant current-limit operation, connect ILIM to VL
for a default current-limit threshold of 170mV (typ). The
sensing resistor value must then be chosen so that:
R
CS_MAX
× I
LIMIT
< 151mV
the minimum value of the default threshold.
Alternately, the constant current-limit threshold can also
be set by using only R18, in which case R18 is calculat-
ed as follows:
When using the DC resistance of the inductor as a cur-
rent-sense resistor, an RC filter is needed (R19 and
C14 of the Typical Applications Circuits). Pick the value
of the filter capacitor, C14, from 0.22µF to 1µF (ceramic
X7R). Then calculate the value of R19 as follows:
R
L_DC
is the nominal value of the inductor’s DC resis-
tance. Additionally, R20 (in the Typical Applications
Circuits) is added in series with the CSN input to cancel
the drop due to input bias current into CSP that devel-
ops across R19. R20 should be set equal to R19.
Compensation Design
The MAX8513/MAX8514 use a voltage-mode control
scheme that regulates the output voltage by comparing
the error-amplifier output (COMP) with a fixed internal
ramp to produce the required duty cycle. The output
lowpass LC filter creates a double pole at the resonant
frequency, which has a gain drop of -40dB/decade and
a phase shift of approximately -180°/decade. The error
amplifier must compensate for this gain drop and
phase shift to achieve a stable high-bandwidth closed-
loop system.
The basic regulator loop consists of a power modulator,
an output feedback divider, and an error amplifier. The
power modulator has a DC gain set by V
IN
/ V
RAMP
(V
RAMP
= 1V
P-P
), with a double pole and a single zero
set by the output inductance (L), the output capaci-
tance (C
OUT
) (C4 in the Typical Applications Circuits),
and its equivalent series resistance (R
ESR
). V
RAMP
is
the peak of the saw-toothed waveform at the input of
the PWM comparator (see the Functional Diagrams in
Figures 1 and 2). Below are equations that define the
power modulator:
where L is L1A and C
OUT
is C4 in the Typical Applica-
tions Circuits.
f
C
R
ZESR
OUT
ESR
=
Ч
Ч
1
2π
G
V
V
f
L
C
MOD DC
IN
RAMP
PMOD
OUT
(
)
=
=
×
1
2π
R
L A
R
C
L DC
19
1
2
14
_
=
Ч
Ч
(
)
R
R
I
A
CS MAX
LIMIT
18
7 5
4 7
.
.
_
=
Ч
Ч
µ
I
LIR
OUT
MAX
1
1
2
_
×
+
R
P
V
A
P
R
R
I
P
R
V
R
I
P
FB
OUT
FB
CS MAX
LIMIT
FB
OUT
CS MAX
LIMIT
FB
17
4 7
1
18
7 5
1
17
7 5
1
1
1
=
Ч
(
)
Ч
(
)
=
Ч
Ч
Ч
(
)
(
)
Ч
Ч
Ч
Ч
(
)
(
)
.
.
.
_
_
µ
-
-
-
-
P
I
I
FB
LIMIT
V
LIMIT
=
@0