beautypg.com

Rainbow Electronics MAX8514 User Manual

Page 20

background image

MAX8513/MAX8514

Wide-Input, High-Frequency, Triple-Output Supplies
with Voltage Monitor and Power-On Reset

20

______________________________________________________________________________________

The peak-to-peak output voltage ripple as a conse-
quence of the ESR, ESL, and output capacitance is:

where C

OUT

is C4 in the Typical Applications Circuits.

where I

P-P

is the peak-to-peak inductor current (see the

Inductor Selection section). An approximation of the
overall voltage ripple at the output is:

While these equations are suitable for initial capacitor
selection to meet the ripple requirement, final values may
also depend on the relationship between the LC double-
pole frequency and the capacitor ESR zero. Generally,
the ESR zero is higher than the LC double pole (see the
Compensation Design section). Solid polymer electrolyt-
ic or ceramic capacitors are recommended due to their
low ESR and ESL at higher frequencies. Higher output
current may require paralleling multiple capacitors to
meet the output voltage ripple.

The MAX8513/MAX8514s’ response to a load transient
depends on the selected output capacitor. After a load
transient, the output instantly changes by (ESR ×
∆I

OUT1

) + (ESL × dI

OUT1

/ dt). Before the controller can

respond, the output deviates further depending on the
inductor and output capacitor values. After a short peri-
od of time (see the Typical Operating Characteristics),
the controller responds by regulating the output voltage
back to its nominal state. The controller response time
depends on the closed-loop bandwidth. With a higher
bandwidth the response time is faster, preventing the
output capacitor from further deviation from its regulat-
ing value. Be sure not to exceed the capacitor’s voltage
or current ratings.

MOSFET Selection

The MAX8513/MAX8514 drive two external, logic-level,
N-channel MOSFETs as the circuit switch elements.
The key selection parameters are:

• For on-resistance (R

DS_ON

), the lower the better.

• Maximum drain-to-source voltage (V

DS

) should be at

least 20% higher than the input supply rail at the
high-side MOSFET’s drain.

• For gate charges (Q

GS

, Q

GD

, Q

DS

), the lower the

better.

Choose the MOSFETs with rated R

DS_ON

at V

GS

=

4.5V. For a good compromise between efficiency and
cost, choose the high-side MOSFET (Q1 in the Typical
Applications Circuits
) that has conduction loss equal to
switching loss at nominal input voltage and maximum
output current. For the low-side MOSFET (Q2 in the
Typical Applications Circuits), make sure that it does
not spuriously turn on due to dV/dt caused by Q1 turn-
ing on as this results in shoot-through current degrad-
ing the efficiency. MOSFETs with a lower Q

GD

/ Q

GS

ratio have higher immunity to dV/dt.

For proper thermal management, the power dissipation
must be calculated at the desired maximum operating
junction temperature, maximum output current, and
worst-case input voltage. For Q2, the worst case is at
V

IN_MAX

. For Q1, it could be either at V

IN_MIN

or

V

IN_MAX

. Q1 and Q2 have different loss components

due to the circuit operation. Q2 operates as a zero volt-
age switch, where major losses are the channel con-
duction loss (P

Q2CC

) and the body-diode conduction

loss (P

Q2DC

).

where V

F

is the body-diode forward voltage drop, t

dt

=

50ns is the dead time between Q1 and Q2 switching
transitions, and f

S

is the switching frequency.

The total losses for Q2 are:

Q1 operates as a duty-cycle control switch and has the
following major losses: the channel conduction loss
(P

Q1CC

), the V I overlapping switching loss (P

Q1SW

),

and the drive loss (P

Q1DR

). Q1 does not have body-

diode conduction loss because the diode never con-
ducts current.

where R

DS_ON

is at the maximum operating junction

temperature.

P

V

V

I

R

Q CC

OUT

IN

OUT

DS ON

1

1

1

2

_

=

Ч

Ч

P

P

P

Q

TOTAL

Q CC

Q DC

2

2

2

_

=

+

P

V

V

I

R

P

I

V

t

f

Q CC

OUT

IN

OUT

DS ON

Q DC

OUT

F

dt

S

2

1

1

2

1

1

2

2

=

 Ч

Ч

=

Ч

Ч

Ч

Ч

_

-

V

V

V

V

RIPPLE

RIPPLE C

RIPPLE ESR

RIPPLE ESL

=

+

+

( )

(

)

(

)

V

V

ESL

L A

ESL

and I

V

V

f L

V

V

RIPPLE ESL

IN

P P

IN

OUT

S

OUT

IN

(

)

=

×

+

=

1

1

1

-

-

V

I

R

V

I

C

f

RIPPLE ESR

P P

ESR

RIPPLE C

P P

OUT

S

(

)

( )

=

Ч

=

Ч

Ч

-

-

8