Rainbow Electronics MAX8514 - Manual (Page 21)

MAX8513/MAX8514
Wide-Input, High-Frequency, Triple-Output Supplies
with Voltage Monitor and Power-On Reset
______________________________________________________________________________________ 21
where I
GATE
is the average DH high driver output-cur-
rent capability determined by:
where R DH is the high-side MOSFET driver’s on-resis-
tance (1.5Ω typ) and R GATE is the internal gate resis-
tance of the MOSFET (≈2Ω).
where V
GS ≈ V VL
= 5V.
The total power loss in Q1 is:
In addition to the losses above, allow approximately
20% more for additional losses due to MOSFET output
capacitances and Q2 body-diode reverse recovery
charge dissipated in Q1. This is not typically well-
defined in MOSFET data sheets. Refer to the MOSFET
data sheet for the thermal-resistance specification to
calculate the PC board area needed to maintain the
desired maximum operating junction temperature with
the above calculated power dissipations.
To reduce EMI caused by switching noise, add a 0.1µF
or larger ceramic capacitor from the high-side MOSFET
drain to the low-side MOSFET source or add resistors
in series with DH and DL to slow down the switching
transitions. However, adding series resistors with DH
and DL increases the power dissipation in the MOSFET
when it switches, so be sure this does not overheat the
MOSFET. The minimum load current must exceed the
high-side MOSFET’s maximum leakage current over
temperature if fault conditions are expected.
MOSFET Snubber Circuit
Fast switching transitions cause ringing because of res-
onating circuit parasitic inductance and capacitance at
the switching nodes. This high-frequency ringing
occurs at LX’s rising and falling transitions and can
interfere with circuit performance and generate EMI. To
dampen this ringing, a series-RC snubber circuit is
added across each switch. The following is the proce-
dure for selecting the value of the series-RC circuit:
1) Connect a scope probe to measure V LX to GND,
and observe the ringing frequency, f R .
2) Find the capacitor value (connected from LX to
GND) that reduces the ringing frequency by half.
The circuit parasitic capacitance (C PAR ) at LX is then
equal to 1/3rd the value of the added capacitance above.
The circuit parasitic inductance (L
PAR ) is calculated by:
The resistor for critical dampening (R SNUB ) is equal to
(2π × f R × L PAR ). Adjust the resistor value up or down to
tailor the desired damping and the peak voltage excur-
sion. The capacitor (C
SNUB ) should be at least 2 to 4
times the value of the C PAR to be effective. The power
loss of the snubber circuit is dissipated in the resistor
(P
RSNUB ) and can be calculated as:
where V IN is the input voltage and f S is the switching
frequency. Choose an R SNUB power rating that meets
the specific application’s derating rule for the power
dissipation calculated.
Current-Limit Setting
The MAX8513/MAX8514 can provide foldback current
limit or constant current limit. Unless constant current-
limit operation is required, such as when driving a con-
stant current load, foldback current limit should be
implemented. Foldback current limit reduces the power
dissipation of external components under overload or
short-circuit conditions.
Foldback Current Limit
For foldback current limit, the current-limit threshold is
set by an external resistive-divider from V
OUT1 to ILIM to
GND (R17 and R18 of the Typical Applications Circuits).
This makes the voltage at ILIM a function of the internal
5µA current source and V
OUT1 . The current-limit com-
parator threshold is equal to V
ILIM
/ 7.5. This threshold is
compared with V SENSE . V SENSE is either the voltage
across the current-sense resistor or, for lossless sens-
ing, the voltage across the inductor. When V
SENSE
exceeds the current-limit threshold, the high-side
MOSFET turns off and the low-side MOSFET turns on.
This allows for a current foldback feature that reduces
the current-limit threshold during a short circuit. This
makes the current threshold limit, when V
OUT = 0V, a
percentage of the current-limit threshold, when V OUT1 is
at its nominal regulated value.
P C V f
RSNUB SNUB IN S
= Ч
( )
Ч
2
L
f C
PAR
R PAR
=
Ч
( )
Ч
1
2
2
π
P P P P
Q Q CC Q SW Q DR 1 1 1 1
= + +
P Q V f
R
R R
Q DR GS GS S
GATE
GATE DH
1
= Ч Ч Ч
+ ( )
I
V
R R
GATE
DH GATE
=
+
( )
2 5 .
P V I f
Q Q
I
Q SW IN OUT S
GS GD
GATE
1 1
= Ч Ч Ч
+
( )