Applications information – Rainbow Electronics MAX8742 User Manual
Page 24
MAX8741/
M
AX8742
500kHz Multi-Output Power-Supply Controllers
with High Impedance in Shutdown
24
______________________________________________________________________________________
Rectifier Diode (Transformer Secondary Diode)
The secondary diode in coupled-inductor applications
must withstand flyback voltages greater than 60V,
which usually rules out most Schottky rectifiers.
Common silicon rectifiers, such as the 1N4001, are also
prohibited because they are too slow. This often makes
fast silicon rectifiers such as the MURS120 the only
choice. The flyback voltage across the rectifier is relat-
ed to the V
IN
- V
OUT
difference, according to the trans-
former turns ratio:
V
FLYBACK
= V
SEC
+ (V
IN
- V
OUT
)
✕
N
where:
N = the transformer turns ratio SEC/PRI
V
SEC
= the maximum secondary DC output voltage
V
OUT
= the primary (main) output voltage
Subtract the main output voltage (V
OUT
) from
V
FLYBACK
in this equation if the secondary winding is
returned to V
OUT
and not to ground. The diode reverse-
breakdown rating must also accommodate any ringing
due to leakage inductance. The rectifier diode’s current
rating should be at least twice the DC load current on
the secondary output.
Low-Voltage Operation
Low input voltages and low input-output differential volt-
ages each require extra care in their design. Low
absolute input voltages can cause the V
L
linear regulator
to enter dropout and eventually shut itself off. Low input
voltages relative to the output (low V
IN
- V
OUT
differential)
can cause bad load regulation in multi-output flyback
applications (see the design equations in the Transformer
Design section). Also, low V
IN
- V
OUT
differentials can
also cause the output voltage to sag when the load cur-
rent changes abruptly. The amplitude of the sag is a
function of inductor value and maximum duty factor (an
Electrical Characteristics parameter, 97% guaranteed
over temperature at f = 333kHz), as follows:
The cure for low-voltage sag is to increase the output
capacitor’s value. Take a 333kHz/6A application circuit
as an example, at V
IN
= +5.5V, V
OUT
= +5V, L = 6.7µH,
f = 333kHz, I
STEP
= 3A (half-load step), a total capaci-
tance of 470µF keeps the sag less than 200mV. The
capacitance is higher than that shown in the Typical
Application Circuit because of the lower input voltage.
Note that only the capacitance requirement increases
and the ESR requirements do not change. Therefore,
the added capacitance can be supplied by a low-cost
bulk capacitor in parallel with the normal low-ESR
capacitor.
Applications Information
Heavy-Load Efficiency Considerations
The major efficiency-loss mechanisms under loads are,
in the usual order of importance:
• P(I
2
R) = I
2
R losses
• P(tran) = transition losses
• P(gate) = gate-charge losses
• P(diode) = diode-conduction losses
• P(cap) = input capacitor ESR losses
• P(IC) = losses due to the IC’s operating supply current
Inductor core losses are fairly low at heavy loads
because the inductor’s AC current component is small.
Therefore, they are not accounted for in this analysis.
Ferrite cores are preferred, especially at 300kHz, but
powdered cores, such as Kool-Mu, can work well:
Efficiency = P
OUT
/P
IN
✕
100% = P
OUT
/(P
OUT
+ P
TOTAL
)
✕
100%
P
TOTAL
= P(I
2
R) + P(tran) + P(gate) + P(diode) +
P(cap) + P(IC)
P (I
2
R) = I
LOAD
2
x (R
DC
+ R
DS(ON)
+ R
SENSE
)
where R
DC
is the DC resistance of the coil, R
DS(ON)
is
the MOSFET on-resistance, and R
SENSE
is the current-
sense resistor value. The R
DS(ON)
term assumes identi-
cal MOSFETs for the high-side and low-side switches
because they time-share the inductor current. If the
MOSFETs are not identical, their losses can be estimat-
ed by averaging the losses according to duty factor:
where C
RSS
is the reverse transfer capacitance of the
high-side MOSFET (a data sheet parameter), I
GATE
is
the DH gate-driver peak output current (1.5A typ), and
20ns is the rise/fall time of the DH driver (20ns typ):
P(gate) = Q
G
✕
f
✕
V
L
where V
L
is the internal-logic-supply voltage (5V), and
Q
G
is the sum of the gate-charge values for low-side
and high-side switches. For matched MOSFETs, Q
G
is
twice the data sheet value of an individual MOSFET. If
V
OUT
is set to less than 4.5V, replace V
L
in this equa-
tion with V
BATT
. In this case, efficiency can be
P tran
V
I
f
V
C
I
ns
IN
LOAD
IN
RSS GATE
(
)
/
=
Ч
Ч
Ч
Ч
Ч
(
)
[
]
3
2
20
-
V
I
L
C
V
D
V
SAG
STEP
OUT
IN MIN
MAX
OUT
=
Ч
Ч
Ч
Ч
2
2
(
)
(
)
-