Xilinx LogiCore PCI v3.0 - Manual (Page 42)

42 www.xilinx.com PCI v3.0.151 Getting Started Guide
UG157 August 31, 2005
Chapter 4: Functional Simulation R
/vhdl/example/func_sim
4. Create the simprim and unisim libraries. This step only needs to be done once, the first
time you perform a simulation:
vlib simprim
vcom -93 -work simprim
Path>/vhdl/src/simprims/simprim_Vpackage_mti.vhd
vcom -93 -work simprim
Path>/vhdl/src/simprims/simprim_Vcomponents_mti.vhd
vcom -93 -work simprim
Path>/vhdl/src/simprims/simprim_VITAL_mti.vhd
vlib unisim
vcom -93 -work unisim
Path>/vhdl/src/unisims/unisim_VPKG.vhd
vcom -93 -work unisim
Path>/vhdl/src/unisims/unisim_VCOMP.vhd
vcom -93 -work unisim
Path>/vhdl/src/unisims/unisim_VITAL.vhd
5. To run the simulation, enter the following:
do modelsim.do
This compiles all modules, loads them into the simulator, displays the waveform viewer,
and runs the simulation.