Xilinx IP Ethernet AVB Endpoint v2.4 UG492 - Manual (Page 42)

42 www.xilinx.com Ethernet AVB Endpoint User Guide
UG492 September 21, 2010
Chapter 5: Core Architecture
Functional Block Description
The following functional blocks described in the following sections are illustrated in
Figure 5-1 and Figure 5-2 .
PLB Interface
The core provides a PLB version 4.6 interface as its configuration port to provide easy
integration with the Xilinx Embedded Development Kit and access to an embedded
processor (MicroBlaze™ or PowerPC®), which is required to run the
“Software Drivers.”
All the configuration and status register address space of the Ethernet AVB Endpoint core
can be accessed through the PLB.
Additionally, when the core is generated in “Standard CORE Generator Format” , the PLB
logic provides a logic shim which is connected to the Host I/F of the supported Xilinx Tri-
Mode MAC core; this enables all configuration and status registers of the MAC to also be
available via the PLB. See
Chapter 10, “Configuration and Status” for more information.
AV Traffic Interface
The AV traffic interface provides a dedicated full duplex port for the high priority AV data.
See
Chapter 6, “Ethernet AVB Endpoint Transmission,” and Chapter 7, “Ethernet AVB
Endpoint Reception” for further information.
Legacy Traffic Interface
The legacy traffic interface provides a dedicated full-duplex port for the legacy data, as
described in
Chapter 6, “Ethernet AVB Endpoint Transmission,” and Chapter 7, “Ethernet
AVB Endpoint Reception” .
When the core is generated in “Standard CORE Generator Format” then “Legacy MAC
Header Filters” are provided on the receiver path. These filters have a greater flexibility
than the address filter provided in the LogiCORE Tri-Mode Ethernet MACs (which must
be disabled).
When the core is generated in “EDK pcore Format” , the legacy traffic interface is designed
to connect directly to the ports of the xps_ll_temac core; please see Figure 5-2 and
Chapter 12, “System Integration” . Additionally, the “Legacy MAC Header Filters” are not
included since the xps_ll_temac can optionally contain its own Address Filter logic.