Texas Instruments THUNDER TNETX3270 - Manual (Page 41)

TNETX3270
ThunderSWITCH

24/3 ETHERNET

SWITCH
WITH 24 10-MBIT/S PORTS AND 3 10-/100-MBIT/S PORTS
SPWS043B – NOVEMBER 1997 – REVISED APRIL 1999
41
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
spanning-tree support
Each port provides independent controls to block reception or transmission of frames, for learning of addresses,
or to disable the port on a per-port basis. Blocking can be overridden to allow reception or transmission of
spanning-tree frames.
aging algorithms
time-threshold aging
When processing (learning) addresses, the IALE adds the source address to the table and tags it with a time
stamp. If another frame is received with this source address, then the time stamp is refreshed. If the aging
counter expires before another frame is received from this source address, then the address is deleted from
the table. If the table is full, then the oldest address is deleted to make room for a new address, even if the age
for this address has not expired.
table-full aging
In table-full aging, the oldest address (or one of the oldest addresses if there is more than one) is automatically
deleted from the IALE records only if the table is full and a new address needs to be added to the table. In this
mode, the age stamp for the addresses is not refreshed.
frame-routing determination
When a frame is received, its 48-bit destination and source addresses are extracted and the VLAN index is
determined. The destination address and VLAN index are then looked up in the IALE records to determine if
a match exists. If a match is found, the information associated with the record is passed on to the frame-routing
algorithm. After removing disabled ports and checking for mirrored and trunking ports, the frame is sent to the
correct ports and the source address time stamp is reported.
The source address and VLAN index combination also are looked up in the IALE records to determine if a match
exists. If a match is found, additional information is provided to the routing process. Figure 9 provides a flow
diagram of the routing algorithm.