Renesas SuperH M3A-HS86 - Manual (Page 21)

Functional Overview
2.2 CPU
Rev.1.0 Feb 06. 2007 2-3
REJ10J0916-0100
2
2.2 CPU
The M3A-HS86 contains the 32-bit RISC microcomputer SH7086 that operates with a maximum 80MHz of CPU
clock frequency. The SH7086 includes 512-Kbyte flash memory, and 32-Kbyte SRAM, making it useful in a wide
range of applications from data processing to equipment control.
The M3A-HS86 can be operated with a maximum 80MHz of CPU clock frequency (external bus 40MHz, max) using
a 10MHz input clock.
Figure2.2.1 shows the SH7086 block diagram in the M3A-HS86.
EXTAL
XTAL
PA15/CK
MD1
MD0
FWE
WDTOVF
RES
PA18/BREQ
PA19/BACK
Clock
Mode
System
Control
NMI NMI Switch
PF0/AN0-PF15/AN15
A/D
Converter
SH7086
H-UDI
Connector
PE12/TCK
PE8/TMS
PE10/TDI
PE11/TDO
PE9/TRST
ASEMD0
PE13/ASEBRKAK/ASEBRK/MRES
PE6/AUDATA0
PE5/AUDATA1
PE4/AUDATA2
PE3/AUDATA3
PE0/AUDCK
PA16/AUDSYNC
PA3/RXD1
PA4/TXD1 Serial Port
Connector
PC0/A0-PC15/A15
PB0/A16
PB1/A17
PC18/A18
PC19/A19
PC20/A20
PC21/A21
PC22/A22
PC23/A23
PC24/A24
PC25/A25
PA26/A26/IRQ0
PA27/A27/IRQ1
PA28/A28/IRQ2
PA29/A29/IRQ3
Address Bus
PD0/D0-PD31/D31 Data Bus
PA10/CS0
PA11/CS1
PA6/CS2
PA7/CS3
PA20/CS4
PA21/CS5/CE1A/CASU/TIC5U
PA14/RD
PB4/RASL/IRQ2
PB5/CASL/IRQ3
PA13/WRH/DQMLU/WE
PA12/WRL/DQMLL
PA23/WRHH/ICIOWR/AH/DQMUU
PA22/WRHL/ICIORD/DQMUL
PA8/RDWR/IRQ2
PA9/FRAME/CKE/IRQ3
Bus Control
PE1
PE2
PE7
PE14
PE16
PE17
PE18
User LED
PB6
PB7
PB8
PB9
User DIP
Switch
PA0/CS4/RXD0
PA1/CS5/CE1A/TXD0
PA2/A25/DREQ0/IRQ0/SCK0
PB2/IRQ0/POE0/SCL
PB3/IRQ1/POE1/SDA
PE15/IRQOUT/CKE/DACK1/TIOC4D
PE19/TIOC4BS
PE20/TIOC4CS
PE21/TIOC4DS
PA17/WAIT/DACK2
PA24/CE2A/DREQ3
PA25/CE2B/DACK3/POE8
SCI/IIC/DMAC/
GPIO/IRQ/
MTU2S
16
PA5/IRQ1/DREQ1 IRQ1 Switch
32
16
Figure2.2.1 SH7086 Block Diagram