Renesas M3A-HS60 - Manual (Page 17)

Functional Overview
2.2 CPU
Rev.1.00 June 1,2005 2-3
REJ11J0002-0100Z
2
2.2 CPU
2.2.1 SH7206
The M3A-HS60 contains SH7206, the 32-bit RISC microcomputer, which operates with a maximum 200MHz of CPU
clock frequency. The SH7206 includes 128-Kbyte RAM, 8-Kbyte instruction cache and 8-Kbyte data cache, and it can
deal with a wide range of applications from data processing to equipment control.
The M3A-HS60 can be operated with a maximum 200MHz of CPU clock frequency (external bus 66.67MHz, max.)
using a 16.67MHz input clock.
Figure2.2.1 shows the block diagram of SH7206 in the M3A-HS60.
AN6/DA0/PF6
AN0-AN5/PF0-PF5
AN7/DA1/PF7
IRQ/SCI/IIC
DMAC/GPIO
MTU2
D31/TIOC3AS/ADTRG#/PD31
SH7206
MD2
MD0
3.3V
EXTAL
XTAL
RES#
WDTOVF#
A0/PC0
D15-0
System
Control
Bus control
Address bus
Mode
Clock
DREQ1/TIOC0C/PE2
SCK2/TIOC3A/PE8
IRQ0/POE0#/SCL/PB2
TXD2/TIOC3C/PE10
TEND0/TIOC0B/PE1
23
16
E10A-USB
Interface
CS0 space
Fixed 16-bit bus
IRQ1/POE1/SDA/PB3
A/D Converter
D/A Converter
NMI#
WE0#/DQMLL/#POE6/PA12
RD#
CS3#/TCLKB/PA7
BS#/RXD2/TIOC2B/UBCTRG/PE7
WE2#/ICIORD#/DQMUL#/TIC5V/PA22
CS8#/PE16
CE2B#/DACK3/PINT7/POE8#/PA25
CE2A#/DREQ3/PINT6/PA24
WE3#/ICIOWR#/AH#/DQMUU#/TIC5W/PA23
CS0#
WE3#/ICIOWR#/AH#/DACK0/TIOC4C/PE14
AUDATA0-3
SCK3/TIOC3B/RTS3#/PE9
TXD3/TIOC4A/PE12
RXD3/TIOC3D/CTS3#
DACK1//CKE/TIOC4D/IRQOUT#/PE15
TCK
TMS
AUDSYNC#
TDO
TRST#
TDI
ASEBRKAK#/ASEBRK#
AUDCK
ASEMD#
NMI
GND
CKIO
MD_CLK2
MD_CLK0
MRES#/TIOC4B/PE13
BREQ#/TEND0/PINT2/PA18
BACK#/TEND1/PINT3/PA19
ASEBCK
ASEBRK#
WE1#/WE#/DQMLU#/POE7#/PA13
CS1#/POE5#/PA11
CS5#/CE1A#/CASU#/PINT5/TIC5U/PA21
CS2#/TCLKA/PA6
CS4#/RASU#/PINT4/PA20
TXD0
RXD0
Serial port
Interface
Data bus
A23-A1
A24/RXD1/PA3
A25/DREQ0/IRQ0/SCK0/PA2
D30/TIOC3CS/IRQOUT#PD30
RD_WR#/IRQ2/TCLKC/PA8
FRAME#/CKE/TCLKD/IRQ3/PA9
CASL#/IRQ3/POE3#PB5
RASL#IRQ2/#POE2/PB4
WAIT#/DACK2/PA17
D29/CS3#/TIOC3BS/PD29
D28/CS2#/TIOC3DS/PD28
D27/DACK1/TIOCS4AS/PD27
D26/DACK0/TIOC4BS/PD26
D25/DREQ1/TIOC4CS/PD25
D24/DREQ0/TIOC4DS/PD24
D23/IRQ7/PD23
D22/IRQ6/TIC5US/PD22
D21/IRQ5/TIC5VS/PD21
D20/IRQ4/TIC5WS/PD20
D19/IRQ3/POE7#/PD19
D18/IRQ2/POE6#/PD18
D17/IRQ1/POE5#/PD17
D16/IRQ0/POE4#/PD16
6
Bus control
GND
Mode 2
4
Figure2.2.1 Block Diagram of SH7206