Gpctr0_gate signal, Figure 4-35. gpctr0_source signal timing, Gpctr0_gate signal -44 – National Instruments 6023E User Manual
Page 74: Figure 4-35, Gpctr0_source signal timing -44
Chapter 4
Signal Connections
4-44
ni.com
Figure 4-35 shows the timing requirements for the GPCTR0_SOURCE
signal.
Figure 4-35. GPCTR0_SOURCE Signal Timing
The maximum allowed frequency is 20 MHz, with a minimum pulse width
of 23 ns high or low. There is no minimum frequency limitation.
The 20 MHz or 100 kHz timebase normally generates the
GPCTR0_SOURCE signal unless you select some external source.
GPCTR0_GATE Signal
Any PFI pin can externally input the GPCTR0_GATE signal, which is
available as an output on the PFI9/GPCTR0_GATE pin.
As an input, the GPCTR0_GATE signal is configured in the edge-detection
mode. You can select any PFI pin as the source for GPCTR0_GATE and
configure the polarity selection for either rising or falling edge. You can use
the gate signal in a variety of different applications to perform actions such
as starting and stopping the counter, generating interrupts, saving the
counter contents, and so on.
As an output, the GPCTR0_GATE signal reflects the actual gate signal
connected to general-purpose counter 0. This is true even if the gate is
externally generated by another PFI. This output is set to high impedance
at startup. Figure 4-36 shows the timing requirements for the
GPCTR0_GATE signal.
t
p
t
w
t
w
t
p
t
w
= 50 ns minimum
= 23 ns minimum