Figure 4-1-3 timer 5/time base block diagram – Panasonic MN101C00 User Manual
Page 73
Chapter 4 Timer Functions
59
Overview
Figure 4-1-3 Timer 5/Time Base Block Diagram
MUX
MUX
MUX
MUX
MUX
MUX
MUX
f osc
f s/4
f osc
f x
250ms (32kHz) 0.977ms (8MHz)
1min (32kHz),250ms (8.38MHz)
3.9ms, 7.8ms, 15.6ms, 31.2ms (32kHz)
1/2
f x
TM5CK0
TM5MD
TM5CK1
TM5CK2
TM5CK3
TM5IR0
TM5IR1
TM5IR2
TM5CLRS
1/2
TM5IRQ
TBIRQ
TM5BC
Read/Write
Read
8-bit counter
TM5OC
Compare register
Match
13
10
1/2
9
1/2
8
1/2
7
R
Synchro-
nization
0
7
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