Juniper Networks Juniper M-series M10i - Manual (Page 9)

ATM2 DS3 IQ PIC
■ JUNOS 6.1 and later Software release
■ Four DS3 ports
■ Power requirement: 0.41 A @ 48 V (20.0 W)
■ Intelligent queuing (IQ) PICs support fine-grained queuing per logical interface.
■ ATM standards compliant
Description
■ 16-MB SDRAM memory for ATM segmentation and reassembly (SAR)
■ ATM switch ID
■ Configurable framing options:
■ C-bit with ATM direct mapping
■ C-bit with Physical Layer Convergence Protocol (PLCP) framing (default)
■ M23 ATM direct mapping
■ M23 with PLCP framing
■ Internal and loop timing
Hardware features
■ Per-virtual circuit (VC) and per-virtual path (VP) traffic shaping
■ Unspecified bit rate (UBR) traffic shaping
■ Fine-grained variable bit rate (VBR) traffic shaping
■ Circuit cross-connect (CCC)
■ ATM Inverse Address Resolution Protocol (ARP), which enables routers to automatically
learn the IP address of the router on the far end of an ATM permanent virtual circuit
(PVC)
■ Simple Network Management Protocol (SNMP):
■ Management Information Base (MIB) 2 (RFC 1213)
■ ATM MIB (RFC 1695)
■ SONET MIB
■ AAL5 encapsulations:
■ ATM-VC-MUX
■ ATM-NLPID
■ ATM-Cisco-LLPID
■ ATM-SNAP
■ ATM-CCC-VC-MUX
Software features
ATM2 DS3 IQ PIC ■ 9
ATM2 DS3 IQ PIC