Motorola MVME2400 - Manual (Page 81)

Memory Maps
http://www.mcg.mot.com/literature 4-3
4
For detailed processor memory maps, including suggested CHRP- and
PREP-compatible memory maps, refer to the MVME2400-Series VME
Processor Module Programmer’s Reference Guide.
PCI Local Bus Memory Map
The PCI memory map is controlled by the MPU/PCI bus bridge controller
portion of the Hawk ASIC and by the Universe PCI/VME bus bridge
ASIC. The Hawk and Universe devices adjust system mapping to suit a
given application via programmable map decoder registers.
No default PCI memory map exists. Resetting the system turns the PCI
map decoders off, and they must be reprogrammed in software for the
intended application.
For detailed PCI memory maps, including suggested CHRP- and PREP-
compatible memory maps, refer to the MVME2400-Series VME Processor
Module Programmer’s Reference Guide.
VMEbus Memory Map
The VMEbus is programmable. Like other parts of the MVME240x
memory map, the mapping of local resources as viewed by VMEbus
masters varies among applications.
The Universe PCI/VME bus bridge ASIC includes a user-programmable
map decoder for the VMEbus-to-local-bus interface. The address
translation capabilities of the Universe enable the processor to access any
range of addresses on the VMEbus.
Recommendations for VMEbus mapping, including suggested CHRP- and
PREP-compatible memory maps, can be found in the MVME2400-Series
VME Processor Module Programmer’s Reference Guide.
Figure 4-1
shows the overall mapping approach from the standpoint of a VMEbus
master.