FUJITSU MPG3XXXAH-E - Manual (Page 15)

C141-E116-01EN xiv
5.3 Protocol for command abort..................................................................................................5 - 79
5.4 WRITE SECTOR(S) command protocol ..............................................................................5 - 80
5.5 Protocol for the command execution without data transfer ...................................................5 - 81
5.6 Normal DMA data transfer....................................................................................................5 - 83
5.7 Ultra DMA termination with pull-up or pull-down ...............................................................5 - 94
5.8 PIO data transfer timing ........................................................................................................5 - 95
5.9 Multiword DMA data transfer timing (mode 2) ....................................................................5 - 96
5.10 Initiating an Ultra DMA data in burst....................................................................................5 - 97
5.11 Sustained Ultra DMA data in burst .......................................................................................5 - 101
5.12 Host pausing an Ultra DMA data in burst .............................................................................5 - 102
5.13 Device terminating an Ultra DMA data in burst....................................................................5 - 103
5.14 Host terminating an Ultra DMA data in burst .......................................................................5 - 104
5.15 Initiating an Ultra DMA data out burst..................................................................................5 - 105
5.16 Sustained Ultra DMA data out burst .....................................................................................5 - 106
5.17 Device pausing an Ultra DMA data out burst........................................................................5 - 107
5.18 Host terminating an Ultra DMA data out burst .....................................................................5 - 108
5.19 Device terminating an Ultra DMA data out burst..................................................................5 - 109
5.20 Power-on Reset Timing .........................................................................................................5 - 110
6.1 Response to power-on ...........................................................................................................6 - 2
6.2 Response to hardware reset ...................................................................................................6 - 3
6.3 Response to software reset ....................................................................................................6 - 4
6.4 Response to diagnostic command..........................................................................................6 - 5
6.5 Address translation (example in CHS mode) ........................................................................6 - 7
6.6 Address translation (example in LBA mode) ........................................................................6 - 8
6.7 Sector slip processing............................................................................................................6 - 11
6.8 Alternate cylinder assignment ...............................................................................................6 - 12
6.9 Data buffer configuration ......................................................................................................6 - 13