National Instruments Eight-slot USB Chassis NI cDAQ-9172 Instruction Manuals and User Guides
We have 1 Instruction Manual and User Guide for Eight-slot USB Chassis NI cDAQ-9172 National Instruments
Manuals 
| Recognized languages: | English |
|---|---|
| Pages: | 84 |
| Size: | 2.07 MB |
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Document Outline
- NI cDAQ-9172 User Guide and Specifications
- Contents
- Introduction
- Safety Guidelines
- Related Documentation
- Installing the Software
- Installing the NI cDAQ-9172
- Setting Up the NI cDAQ-9172
- Understanding LED Indications
- Using the NI cDAQ-9172
- Analog Input
- Analog Output
- Digital I/O
- PFI
- Counters
- Figure 15. NI cDAQ-9172 Counters
- Counter Input Applications
- Counting Edges
- Figure 16. Single-Point (On-Demand) Edge Counting
- Figure 17. Single-Point (On-Demand) Edge Counting with Pause Trigger
- Figure 18. Buffered (Sample Clock) Edge Counting
- Pulse-Width Measurement
- Figure 19. Single Pulse-Width Measurement
- Figure 20. Buffered Pulse-Width Measurement
- Period Measurement
- Figure 21. Single Period Measurement
- Figure 22. Buffered Period Measurement
- Semi-Period Measurement
- Figure 23. Buffered Semi-Period Measurement
- Frequency Measurement
- Figure 24. Frequency Measurement-Method 1
- Figure 25. Frequency Measurement-Method 1b
- Figure 26. Frequency Measurement-Method 2
- Figure 27. Frequency Measurement-Method 3
- Table 5. Frequency Measurement Method 1
- Table 6. Frequency Measurement Method Comparison
- Position Measurement
- Figure 28. X1 Encoding
- Figure 29. X2 Encoding
- Figure 30. X4 Encoding
- Figure 31. Channel Z Reload with X4 Decoding
- Figure 32. Measurements Using Two Pulse Encoders
- Two-Signal Edge-Separation Measurement
- Figure 33. Single Two-Signal Edge-Separation Measurement
- Figure 34. Buffered Two-Signal Edge-Separation Measurement
- Counter Output Applications
- Simple Pulse Generation
- Figure 35. Single Pulse Generation
- Figure 36. Single Pulse Generation with Start Trigger
- Figure 37. Retriggerable Single Pulse Generation
- Pulse Train Generation
- Figure 38. Continuous Pulse Train Generation
- Frequency Generation
- Figure 39. Frequency Generator Block Diagram
- Figure 40. Frequency Generator Output Waveform
- Frequency Division
- Counter Timing Signals
- Counter n Source Signal
- Table 7. Counter Applications and Counter n Source
- Table 8. Counter n Source Timing
- Counter n Gate Signal
- Counter n Aux Signal
- Counter n A, Counter n B, and Counter n Z Signals
- Counter n Up_Down Signal
- Counter n HW Arm Signal
- Counter n Internal Output and Counter n TC Signals
- Frequency Output Signal
- Default Counter/Timer Routing
- Counter Triggering
- Other Counter Features
- Cascading Counters
- Counter Filters
- Table 9. Counter Input Filters
- Figure 41. Filter Example
- Prescaling
- Figure 42. Prescaling
- Duplicate Count Prevention
- Figure 43. Duplicate Count Prevention Example
- Figure 44. Duplicate Count Example
- Figure 45. Duplicate Count Prevention Example
- Synchronization Modes
- Table 10. Synchronization Mode Conditions
- Figure 46. 80 MHz Source Mode
- Figure 47. Other Internal Source Mode
- Figure 48. External Source Mode
- Digital Routing and Clock Generation
- Specifications
- Analog Input
- Analog Output
- Digital Waveform Characteristics (Slots 1 through 4 Only)
- PFI Characteristics (Slots 5 and 6 Only)1
- General-Purpose Counter/Timers (Slots 5 and 6 Only)
- Frequency Generator (Slots 5 and 6 Only)
- External Digital Triggers (Slots 5 and 6 or with Some AI Modules)
- Module I/O States
- Power Requirements
- Bus Interface
- Physical Characteristics
- Safety
- Environmental
- Shock and Vibration
- Electromagnetic Compatibility
- CE Compliance
- Environmental Management
- Where to Go for Support