Epson S1C62 Family - Manual (Page 3)

S1C62 Family Development Tool Reference Manual
Preface
The explanation covering the outline and operation of the development support tools for the CMOS 4-bit
Single Chip Microcomputer S1C62 Family has been divided into the following parts.
I. INTRODUCTION
II. DEVELOPMENT TOOL MANAGEMENT SYSTEM DMS6200
III. CROSS ASSEMBLER ASM62XX
IV. MELODY ASSEMBLER MLA628X
V. FUNCTION OPTION GENERATOR FOG62XX
VI. SEGMENT OPTION GENERATOR SOG62XX
VII. EVALUATION BOARD S5U1C62XXXE
VIII. ICE CONTROL SOFTWARE ICS62XX
IX.
MASK DATA CHECKER MDC62XX
Before Reading . . .
This manual indicates the model name as "S1C62XXX" and source file and output files as "C2XXYYY" for
purposes of explanation of the common content in each model of the S1C62 Family. You should substitute
the "XXX" parts for the various model names. Please allow Seiko Epson to specify the "YYY" section for
each customer.
Example: When the development model is S1C6S460, and the "YYY" section is to be specified as "0A0".
S1C6XXXX
→
S1C6S460
CXXXYYY
→
CS460A0
Reference Manual
The peculiar content of each model, device details and the like are explained in the below manual. You
should refer to it as required.
Development Tools
☞
S5U1C62xxxD Manual (Development Software Tool for S1C62xxx)
S5U1C62xxxE Manual (Evaluation Board for S1C62xxx)
S5U1C62000H Manual (S1C60/62 Family In-Circuit Emulator)
Device (S1C62xxx)
☞
S1C62xxx Technical Manual
Instructions
☞
S1C6200/6200A Core CPU Manual
∗
In this manual, "ICE" and "evaluation board" indicate S5U1C62000H and S5U1C62xxxE, respectively.