Avago Technologies ACPL-336J-000E - Manual (Page 5)

5
Application Circuit Description
The ACPL-337J is an isolated gate driver that provides >4 A output current. The voltage and high peak output current
supplied by this optocoupler make it ideally suited for direct driving of IGBT with ratings up to 1000 V/100 W. It is also
designed to drive different sizes of buffer stage that will make the class of IGBT scalable. ACPL-337J provides a single
isolation solution suitable for both low power and high power ratings of motor control and inverter applications.
Each of the ACPL-337J evaluation boards, as shown in Figure 5, accommodates an ACPL-337J IC. The board is enough
to drive an Inverter arm. This allows the designer to easily test the performance of gate driver in an actual application
solution. Operation of the evaluation board requires just the inclusion of a common 5V DC isolated Supply1 on the input
side and two isolated DC supplies on the output side, together with a PWM drive signal from the microcontroller.
Provision is done on the board to allow for the LED to be driven either directly by external 5V PWM (10 kHz) signals or
the generated LED signal, by disconnecting or connecting the shunt post at CON2, respectively. By default, the LED
is driven by the internally generated LED drive signal (LEDDRV pin 4 at U1). Once the shunt post at CON2 is removed,
external PWM signals (at 5V
PP
10 kHz) can be connected directly to LED+ and LED- pins at CON1 to drive the LED of the
optocoupler through the onboard current limiting resistors. This provision is to provide the designer flexibility.
Once the LED is driven by a signal current (typically 11.5 mA), output at pin 11 is activated with a positive pulse volt-
age and ready to drive the IGBT’s gate through a gate resistor R6 (10 Ω). Assuming that the voltage supply at V
CC2
and
V
EE
w.r.t. V
E
(or E) are +15V and -5V respectively, the maximum drive current is limited to 2 A peak (= (V
CC2
– V
EE
)/R
G
). If
needed, R
G
can be reduced to accommodate up to 4 A of peak output drive current allowable by the specification. But
care must be taken to ensure that junction temperature of the device is always below 125 °C.
ACPL-337J is a smart gate driver with many integrated protection features such as:
a. IGBT collector desaturation fault protection against overload as well as short circuit,
b. Preventing false turn-on due to Miller current effect, and
c. UVLO to prevent premature output turn-on due to insufficient supply voltage.
Desat Protection
For normal loading during IGBT turn-on, the collector saturation voltage should fall below 5V (= Vdesat – Iconstant *
Rdesat – VF), where
V
desat
= 7V typical (protection threshold of Desat voltage)
I
constant
= 1 mA of internal constant current source
R
desat
= 1 k Ω of R5
V
F
= 1V (typical) of D1 for BYV26E at 1 mA
During overload or short circuit, the collector saturation voltage is higher than 5 V and the detected voltage at the Desat
pin 14 of U1 will be higher than 7 V. This will trigger output shutdown (output soft shutdown will be initiated and at the
same time the /Fault feedback pin 6 will be pulled low to inform external microcontroller that there is a Fault happening
at the IGBT power switch) to turn off the IGBT to protect it from damage. So the IGBT should be selected such that its
collector saturation voltage during turn-on under full load condition is less than 5 V. If the collector saturation voltage
during full load is too low, e.g., < 3 V, then adding a 2 V Zener between R5 and diode D1 would definitely help to provide
proper overload or short circuit protection.
For other design criteria for Desat protection, refer to the application notes.
Preventing false turn-on by Miller effect
Every IGBT used will have a junction capacitance between collector and gate (or Miller capacitance). Ideally, this capaci-
tance has to be as small as possible, but it can never be eliminated. This Miller capacitance might allow transient current
to flow from collector to gate and causes the gate voltage to rise during gate turn-off duration. If this sudden surge of
gate voltage is higher than the gate threshold voltage (usually 2~5V), a false IGBT turn-on might happen.
To prevent this, the IGBT gate voltage is monitored (by connecting it to the Clamp pin 10 of U1) during the turn-off dura-
tion. During turn-off, the gate voltage, as monitored, is pulled low and it will drop from V
CC2
level to V
EE2
level. As soon
as this gate voltage level drops below 2 V w.r.t. V
EE2
, an internal clamp is activated to shunt the Clamp pin 10 to pin 9,
which is at V
EE2
level. By doing so, it ensures that the gate voltage has no chance of getting over 2 V again during the
entire IGBT off duration. Monitoring of this pin 10 will notice a sudden dip in voltage from 2 V (typically) to 0 V immedi-
ately, to confirm that the active Miller Clamp is working properly.
Note: As an active Miller clamp is built-in to this ACPL-337J device, negative supply is not needed, and V
E
and V
EE2
can be shorted.