Sundance SMT1026 - Manual (Page 44)

Data format: Select the format of the output data (binary or 2's complement).
VCXO type: Select the type of the VCXO fitted on the FPGA TIM (100 MHz or 245.76
MHz).
Clock Divider: Select the clock divider for the sampling frequency.
External clock: Check this check box if you are using an external clock.
Trigger inverting: Check this check box for an inverting trigger.
External trigger: Check this check box if you are using an external trigger.
Test: Check this check box to use the ADC test data as input data.
Configure ADC: Press this button to configure the ADCs of the SMT384.
3 - Acquisition:
File to save data: Set the file to which the data should be written.
Bytes to acquire: Set the size of the acquisition in bytes (or /2 14-bit samples).
Bytes to avoid: Set the number of bytes (or /2 14-bit samples) to avoid before starting
the acquisition. This can be useful in some cases. For example, the host comport on the
SMT310Q has a very small buffer that can overflow before the acquisition starts. By
setting the "Bytes to avoid" field, the comport buffer gets empty before starting the
acquisition.
Host link: Select the link used between the host and the carrier board. Most of the time it
will be the host comport but sometime it's possible to use the host RSL.
Acquire data: Press this button to start an data acquisition.
4.1.5 SMT391
This section explains how to use the "Configure FPGA-only module" user interface.
For more information on how to set the parameters please look at the SMT391 user
manual .