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Sundance SMT351 User Manual

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Version 1.6

Page 3 of 25

SMT351 User Manual

Table of Contents

Revision History.......................................................................................................... 2

Table of Contents ....................................................................................................... 3

Introduction................................................................................................................. 7

Description .............................................................................................................. 7

Features.................................................................................................................. 7

Additional resources ............................................................................................... 7

Architecture description .............................................................................................. 8

SMT351 block diagram ........................................................................................... 8

Block description ..................................................................................................... 9

FPGA ...................................................................................................................... 9

Memory ................................................................................................................... 9

CPLD ...................................................................................................................... 9

Sundance High Speed Bus ..................................................................................... 9

Comports ................................................................................................................ 9

TTL I/Os. ............................................................................................................... 10

LEDs ..................................................................................................................... 10

JTAG..................................................................................................................... 10

Switch ................................................................................................................... 10

Using the SMT351 .................................................................................................... 11

FPGA Configuration ................................................................................................. 12

Reset ........................................................................................................................ 13

Functional description............................................................................................... 14

FPGA design overview.......................................................................................... 14

Memory compartments ......................................................................................... 15

Sundance High Speed Bus (SHB) ........................................................................ 16

Registers............................................................................................................... 16

Clock structure ...................................................................................................... 17

FPGA implementation .............................................................................................. 18

Language .............................................................................................................. 18

3L Diamond........................................................................................................... 18

Synthesis and Implementation tool ....................................................................... 18