Sundance SMT351 - Manual (Page 18)

Version 1.6 Page 18 of 25 SMT351 User Manual
FPGA implementation
This section gives some technical details about the FPGA firmware.
Language
The FPGA is fully designed in VHDL.
3L Diamond
The FPGA of the SMT351 is designed with 3L Diamond FPGA .
All examples provided are designed using Diamond.
For more information about 3L Diamond please refer the 3L website .
Synthesis and Implementation tool
The design is implemented using Xilinx ISE 8.2 SP2. Synthesiser used is XST.
FPGA resource usage
Follow is the device utilization summary after Place and Route:
Resource XC2VP7
Number of
External IOBs 70% (278/ 396)
Number of
RAMB16s 40% (18/ 44)
Number of
SLICEs 82% (4081/ 4928)
Number of
BUFGMUXs 50% (8/ 16)
Number of
DCMs 50% (2 / 4)
Power PC 0% (1 / 1)