Measurement Computing PC-CARD-DAS16/330 - Manual (Page 19)

PC-CARD-DAS16/330 User's Guide Functional Details
A logic diagram of the A/D pacer clock and counter is shown here:
Control Register BASE + 6h
TRGPOL TRGSEL TRGCLR CLK2 CTR1
1/10
1/10
10 MHz
OSC
Trigger
Logic
TS1 TS0
MUX
1
0
3
2
1
0 S/W CONVERT
Trigger
Logic
39
40
41
47
44
45
42
CRT1 CLK
CTR1 GATE
CTR1 OUT
A/D INTERNAL
PACER OUT
A/D PACER GATE
A/D EXTERNAL
TRIGGER
A/D EXTERNAL
CLOCK
0
1
A/D Convert CLock
Control register
BASE + 4h
CLK
CLK
CLK
Counter 1
Counter 2
Counter 3
10K
10K 5
5
GATE
GATE
GATE
OUT
OUT
OUT
Figure 9. Counter/pacer logic diagram
Additional information on the 82C54 programmable counter/timer is available on our web site at
www.mccdaq.com/PDFmanuals/82c54.pdf .
19