Measurement Computing CIO-DAS16/M1/16 - Manual (Page 17)

5.7 BURST LENGTH, EXTERNAL TRIGGER, CTR0/TRG0
BASE ADDRESS +Ah Example, 30Ah, 778 Decimal
READ/WRITE
TRG0 CTR0 TRGSEL TRGPOL BL0 BL1 BL2 BL3
0 1 2 3 4 5 6 7
BL3:0 - Burst Length. The number of channels in the burst are set by BL3:0, where the channels that are contained
in the burst are set by register BASE+2. For example:
To do a channel burst conversion on channels 0 to 2, set BASE +2 to 20 hex and the upper
nibble of BASE +Ah to 3.
TRGPOL - Trigger polarity. 0 = rising trigger/high gate, 1 = falling trigger/low gate.
TRGSEL - Trigger select. 0 = Gate - generate conversions while signal is active, 1 = Trigger - single edge to
initiate conversions.
CTR0 - Counter 0 control. 0 = external clock input to counter 0, 1 = internal 1 MHz input.
TRG0 - Trigger enable. 0 = Gates for counters 1 and 2 enabled preventing external triggers, 1 = external
trigger enabled allowing rising edge to trigger counter (A/D converter).
5.8 COUNTER, GAIN/RANGE CONTROL
BASE ADDRESS +11 Example, 30Bh, 779 Decimal
READ/WRITE
G0 G1 U/B FFNE* RCG Enhanced Not Used Not Used
0 1 2 3 4 5 6 7
* Read Only
Enhanced Mode and RCG bits are used in REP INSW conversion mode to allow the correct number of samples to be
taken. In REP INSW, an interrupt is generated every 512 samples at which point the REP INSW function is used to
perform a block transfer of the 512 samples. When the number of samples to be taken is not a multiple of 512, the
final interrupt would never be generated. Therefore, a mechanism has been implemented allowing the software to
know how many samples are left in the FIFO. The Residual Counter functions as follows:
The software knows how many samples the user wants to convert, and divides this number by 512 (the number of
samples in a REP INSW block) - this will be the total number of interrupts generated by the FIFO. The remaining
number of samples is written to Counter 0.
The user then starts conversions, taking interrupts every 512 sample blocks. When the number of interrupts is 1 less
than the total, software will set the RCG bit. When the last interrupt is generated, each subsequent conversion counts
down Counter 0 until it reaches terminal count, at which time the final interrupt is generated to read off remaining
samples.
ENHANCED - Enhanced Mode. Enhanced Mode is used to enable Counter 0 to function as the residual counter,
disconnecting it from being a general purpose counter to the user. 0 = default, 1 = Enhanced mode.
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