Measurement Computing PCIe-DAS1602/16 - Manual (Page 16)

16
Chapter 3
Specifications
All specifications are subject to change without notice.
Typical for 25 °C unless otherwise specified.
Specifications in italic text are guaranteed by design.
Power consumption
3.3 V quiescent 500 mA typ, 750 mA max
12 V quiescent 100 mA typ, 150 mA max
User 5 V outputs 10mA
Analog input
A/D converter type LTC1605CSW
Resolution 16 bits
Number of channels (switch-selectable) 16 SE/8 DIFF
Input ranges
 Gain (software-selectable)
 Unipolar/bipolar polarity (switch-selectable) ±10 V, ±5 V, ±2.5 V, ±1.25 V
0 V to 10 V, 0 V to 5 V, 0 to 2.5 V, 0 V to 1.25 V
A/D pacing (software-selectable) Internal counter: 82C54
Positive or negative edge (jumper-selectable)
External source: pin 25
Positive or negative edge (software-selectable)
Software polled
A/D trigger (only available when internal pacing
selected, software-selectable) External edge trigger: pin 25
Positive or negative edge (software-selectable)
A/D gate (only available when internal pacing
selected, software-selectable) External gate: pin 25
High or low level (software-selectable)
Simultaneous sample and hold trigger TTL output: pin 26 (jumper-selectable)
Logic 0 = Hold, Logic 1 = Sample
Compatible with CIO-SSH16
Burst mode (software-selectable) Burst interval = 10 us
Data transfer From 1024 sample FIFO via interrupt with REPINSW
Interrupt
Software polled
Interrupt INTA# - mapped to IRQn through PCI BIOS at boot-time
Interrupt enable Programmable through PCI9030
Interrupt polarity Active high level or active low level, programmable through
PLX9030
Interrupt sources (software-selectable) End of conversion
FIFO not empty
End of burst
End of acquisition
FIFO half full
A/D conversion time 10 µs max
Throughput
 Single channel: 100 kS/s
 Multi-channel: (100 kS/s)/(# of channels)
Common mode range ±10 V min
CMRR @ 60 Hz –100 dB typ, –80 dB min
Input leakage current ±3 nA max
Input impedance 10 M
Ω min