Measurement Computing PC104-DAS16JR/12 User Manual
Page 26

A/D conversion time
PC104-DAS16Jr/12
3.3 µs
PC104-DAS16Jr/16
10 µs
Throughput
PC104-DAS16Jr/12
150 kHz
PC104-DAS16Jr/16
100 kHz
Accuracy
PC104-DAS16Jr/12
0.01% of reading, ±1LSB
PC104-DAS16Jr/16
0.003% of reading, ±1LSB
Integral Linearity error
PC104-DAS16Jr/12
±1 LSB
PC104-DAS16Jr/16
±1.5 LSB (±3LSB on 1.25V ranges)
Differential Linearity
±1 LSB
No missing codes guaranteed
PC104-DAS16Jr/12
12 bits
PC104-DAS16Jr/16
16 bits
Gain drift (A/D specs)
PC104-DAS16Jr/12
±6 ppm/°C
PC104-DAS16Jr/16
±7 ppm/°C
Zero drift (A/D specs)
PC104-DAS16Jr/12
±1 ppm/°C
PC104-DAS16Jr/16
±2 ppm/°C
Common Mode Range
±10V
CMRR @ 60 Hz
70 dB
Input leakage current (@ 25 deg C)
±20 nA
Input impedance
10 Mohms min
Absolute maximum input voltage
±35V
Digital I/O section
Digital type
FPGA
Configuration
Two ports, 4 bits each, 4 input and
4 output
Input low voltage
0.8V max
Input high voltage
2.0V min
Output low voltage (IOL = 4 mA)
0.32V max
Output high voltage (IOH =
−
4 mA)
3.86V min
Absolute maximum input voltage
−
0.5V , +5.5V
Interrupts
Programmable: levels 2 to 7
Interrupt enable
Programmable
Interrupt sources
End-of-conversion, DMA terminal
count
22