Foxconn 925XE7AA-8EKRS2 - Manual (Page 52)

Chapter 3 BIOS Description
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925XE7AA Series User Manual
Advanced Chipset Features
DRAM Timing Selectable (Default: By SPD)
This item determines DRAM clock/ timing using SPD or manual configuration.
The available setting values are: By SPD and Manual.
CAS Latency Time (Default: depend on memory)
This item determines CAS Latency. The available setting values are: 5, 4, 3
and Auto.
DRAM RAS# to CAS# Delay (Default: depend on memory)
This item allows you to select a delay time between the CAS and RAS strobe
signals. The available setting values are: 5, 4, 3, 2, and Auto.
DRAM RAS# Precharge (Default: depend on memory)
This item allows you to select the DRAM RAS# precharge time. The available
setting values are: 5, 4, 3, 2, and Auto.
Precharge delay(tRAS) (Default: depend on memory)
This item allows you to set the precharge delay time. The available setting
values are: Auto, 4 - 15.
System BIOS Cacheable (Default: Enabled)
Select “Enabled” to allow caching of the system BIOS which may improve
performance. If any other program writes to this memory area, a system error
may result. The available setting values are: Enabled and Disabled.
Video BIOS Cacheable (Default: Disabled)
Select “Enabled” to allow caching of the Video BIOS which may improve
performance. If any other program writes to this memory area, a system error
may result. The available setting values are: Enabled and Disabled.
Advanced Chipset Features Menu