3 debug ports, 1 p1 jtag, Table 3-10 – Artesyn COMX-P2020 Installation and Use (February 2015) User Manual
Page 72: Cpu debug (p1), Table 3-11, Ge phy debug (test point14-19), Controls, leds, and connectors
Controls, LEDs, and Connectors
COMX-P2020 Module Installation and Use (6806800K97E)
72
3.2.3
Debug Ports
3.2.3.1
P1 JTAG
The 16-PIN JTAG header support standard JTAG signals: TCK, TMS, TDO, TDI,
TRST(COP_TRST#).
JTAG also supports these extra signals: CKSTP_IN to stop processor core and CKSTP_OUT# to
get CORE status.
Table 3-10 CPU Debug (P1)
Pin
Signal
Pin
Signal
1 JTAG_TDO 2 NC
3 JTAG_TDI
4 COP_TRST#
5 COP_RUNSTOP
6 COP_VSENSE
7 JTAG_TCK
8 P_CKSTP_IN#
9 JTAG_TMS
10 NC
11 COP_SRST# 12 GND
13 COP_HRST# 14 NC
15 P_CKSTP_OUT#
16 GND
Table 3-11 GE PHY Debug (Test Point14-19)
Test Point
Signal
TP14
JTAG_GE1_TDO_GE2_TDI
TP15
JTAG_GE1_TDI
TP16
JTAG_GE2_TDO
TP17
JTAG_GE_TCK
TP18
JTAG_GE_TMS
TP19
JTAG_GE_TRST#
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