Artesyn COMX-P2020 Installation and Use (February 2015) - Manual (Page 64)

Controls, LEDs, and Connectors
COMX-P2020 Module Installation and Use (6806800K97E) 64
Signal name LGPL0
Function RapidIO Size
(cfg_rio_sys_size)
Select Option PU / PD Resistors
Default value 1
Supported configuration 0 Large system size
1 Small system size
Signal name DMA2_DACK0_B
Function Memory Debug
(cfg_mem_debug)
Select Option PU / PD Resistors
Default value 1
Supported configuration 0 Debug information from the enhanced local bus
controller is driven on the MSRCID and MDVAL
signals.
1 Debug information from the DDR SDRAM
controller is driven on the MSRCID and MDVAL
signals.
Signal name DMA2_DDONE0_B
Function DDR Debug
(cfg_ddr_debug)
Select Option PU / PD Resistors
Default value 1
Supported configuration 0 Debug information is driven on the ECC pins
instead of normal ECC I/O. ECC signals from
memory devices must be disconnected.
1 Debug information is not driven on ECC pins. ECC
pins function in their normal mode.