Avalue EBM-CX700 - Manual (Page 56)

EBM-CX700 Series
56 EBM-CX700 Series User’s Manual
3.5.2.5 CPU L3 Cache
This item allows you to enable the CPU L3 cache to speed up memory access.
Item Description
Enabled Enable cache
Disabled Disable cache
3.5.2.6 CPU L2 Cache ECC Checking
This item allows you to enable the CPU external L2 cache use ECC checking method in
memory access.
Item Description
Enabled Enable ECC checking
Disabled Disable ECC checking
3.5.2.7 Quick Power On Self Test
This category speeds up Power On Self Test (POST) after you power up the computer. If it
is set to Enable, BIOS will shorten or skip some check items during POST.
Item Description
Enabled Enable quick POST
Disabled Normal POST
3.5.2.8 First / Second / Third / Other Boot Device
The BIOS attempts to load the operating system from the devices in the sequence selected
in these items.
Item Description
LS120 LS120 Device
Hard Disk Hard Disk Device
CDROM CDROM Device
ZIP100 ZIP-100 Device
USB-FDD USB Floppy Device
USB-ZIP USB ZIP Device
USB-CDROM USB CDROM Device
Legacy LAN Network Device
Enabled Enabled any boot device
Disabled Disabled any boot device
3.5.2.9 Boot Up NumLock Status
Select power on state for NumLock.
Item Description
Off Off NumLock
On On NumLock
3.5.2.10 Typematic Rate Setting
Key strokes repeat at a rate determined by the keyboard controller. When enabled, the
typematic rate and typematic delay can be selected.
Item Description
Enabled Enable typematic rate/delay setting
Disabled Disable typematic rate/delay setting
3.5.2.11 Typematic Rate (Chars/Sec)
Sets the number of times a second to repeat a key stroke when you hold the key down.
The choice: 6, 8, 10, 12, 15, 20, 24, 30.
3.5.2.12 Typematic Delay (Msec)
Sets the delay time after the key is held down before it begins to repeat the keystroke.
The choice: 250, 500, 750, 1000.