ADLINK cPCI-6520 - Manual (Page 30)

18 Functional Description
3.3 PMC/XMC Site
The cPCI-6520 supports one PMC or XMC site for front panel I/O
expansion. The PMC site provides a maximum 32/64-bit,
33/66/133MHz PCI bus link using a Pericom PI7C9X130
PCIe-to-PCI-X bridge and PCIe x4 link. The PMC site supports
+3.3V and 5V signaling. The XMC site provides a PCIe x8 lane.
3.4 Intel® Turbo Boost Technology
Intel Turbo Boost Technology is a feature that allows the processor
to opportunistically and automatically run faster than its rated
operating core and/or render clock frequency when there is suffi-
cient power headroom, and the product is within specified temper-
ature and current limits. The Intel Turbo Boost Technology feature
is designed to increase performance of both multi-threaded and
single-threaded workloads. The processor supports a Turbo mode
where the processor can use the thermal capacity associated with
package and run at power levels higher than TDP power for short
durations. This improves the system responsiveness for short,
bursty usage conditions.
Turbo Mode availability is independent of the number of active
cores; however, the Turbo Mode frequency is dynamic and depen-
dent on the instantaneous application power load, the number of
active cores, user configurable settings, operating environment,
and system design. If the power, current, or thermal limit is
reached, the processor will automatically reduce the frequency to
stay with its TDP limit.
3.5 Intel® Hyper Threading Technology
The processor supports Intel® Hyper-Threading Technology
(Intel® HT Technology), that allows an execution core to function
as two logical processors. While some execution resources (such
as caches, execution units, and buses) are shared, each logical
processor has its own architectural state with its own set of gen-
eral-purpose registers and control registers. This feature must be
enabled using the BIOS and requires operating system support.