ADLINK PCI-9820 - Manual (Page 8)

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• Figures
Figures
Figure 1.1: PCI-9820 block diagram................................................9
Figure 3.1: Location of connectors................................................16
Figure 3.2: Location of solder switches.........................................17
Figure 4.1 Post trigger...................................................................21
Figure 4.2 Pre trigger (the trigger event occurs after the specified
amount of data has been acquired)...............................................21
Figure 4.3 Pre trigger (The trigger signal is accepted anytime after
the operation starts) ......................................................................22
Figure 4.4 Pre trigger (The trigger signal will be ignored until the
specified amount of data is acquired)............................................22
Figure 4.5 Middle trigger ..............................................................23
Figure 4.6 Delay trigger.................................................................23
Figure 4.7 Post-trigger with re-trigger............................................24
Figure 4.8 Analog trigger conditions..............................................25
Figure 4.9 External digital trigger input .........................................26
Figure 4.10 TRG IO output signal timing.......................................26
Figure 4.11 Scatter/gather DMA for data transfer .........................27
Figure 4.12 SSI_TRIG1 output signal timing.................................29
Figure 4.13 SSI_TRIG1 input signal timing...................................29
Figure 4.14 SSI_TRIG2 output signal timing.................................29
Figure 4.15 SSI_TRIG2 input signal timing...................................30
Figure 4.16 SSI_START_OP output signal timing ........................30
Figure 4.17 SSI_START_OP input signal timnig ..........................30