ADLINK PCI-9820 - Manual (Page 12)

2
• Introduction
The PCI-9820 device supports SODIMM SDRAM ranging from 64MB to
512MB. The digitized data is stored in the on-board SDRAM before being
transferred to host memory. The PCI-9820 uses scatter-gather bus mas-
tering DMA to move data to the host memory. If the data throughput from
the PCI-9820 is less than the available PCI bandwidth, the PCI-9820 also
features on-board 3k-sample FIFO to achieve real-time transfer bypassing
the SDRAM, directly to the host memory.
Triggering
The PCI-9820 features flexible triggering functions, such as analog and
digital triggering. The analog trigger features programmable trigger
thresholds on rising or falling edges of both input channels. The 5V/TTL
digital trigger comes from SSI interface or the external SMB connector for
synchronizing multiple devices.
Post-trigger, pre-trigger, delay-trigger and middle-trigger modes are
available to acquire data around the trigger event. The PCI-9820 also
features repeated trigger acquisition to acquire data in multiple segments
coming with successive trigger events at extremely short rearming inter-
vals.
Multiple-Instrument Synchronization
On the PCI-9820, a synchronization bus (system synchronization interface,
SSI) routes timing and trigger signals between one or more PCI-9820 de-
vices. The SSI synchronizes between different acquisition hardware by a
common trigger signal or a single sample clock for the acquisition of mul-
tiple devices.
Calibration
The auto-calibration function of the PCI-9820 is performed with trim DACs
to calibrate the offset and gain errors of the analog input channels. Once
the calibration process is done, the calibration constant will be stored in
EEPROM. These values are loaded and used as needed by the board.
Because all the calibration is conducted automatically by software com-
mands, users do not have to adjust trimpots to calibrate the boards.