ADLINK PCI-9820 User Manual
Page 27

Signal Connections
• 17
3.2 Analog Input Impedance Setting
3.2.1
Analog Input Impedance Setting
The CH0 and CH1 input impedance can be selected to 50Ω or 1.5MΩ by
soldering gap switches J6 and J7 on the backside of the PCI-9820. The lo-
cation of J6, J7 and the corresponded input impedance setting are shown in
Fig. 3.2 and Table 3.2. The default setting is 50Ω input impedance.
J6
CH0 Input Im-
pedance
J7
CH1 Input Im-
pedance
Open
High (1.5M
Ω
)
Open
High (1.5M
Ω
)
Close
(Default)
Low (50
Ω
)
Close
(Default)
Low (50
Ω
)
Table 3.2: Location of solder switches
Figure 3.2: Location of solder switches
See also other documents in the category ADLINK Hardware:
- USB-1901 (84 pages)
- USB-1210 (54 pages)
- USB-2401 (60 pages)
- USB-7230 (50 pages)
- USB-2405 (56 pages)
- DAQe-2010 (92 pages)
- DAQe-2204 (100 pages)
- DAQe-2213 (94 pages)
- DAQe-2501 (74 pages)
- PXI-2010 (84 pages)
- PXI-2020 (60 pages)
- PXI-2501 (62 pages)
- cPCI-9116 (98 pages)
- ACL-8112 Series (93 pages)
- ACL-8112 Series (94 pages)
- ACL-8112 Series (92 pages)
- ACL-8216 (75 pages)
- ACL-8111 (61 pages)
- PCM-9112+ (10 pages)
- PCM-9112+ (94 pages)
- cPCI-6216V (47 pages)
- ACL-6126 (28 pages)
- ACL-6128A (40 pages)
- PCM-6308V+ (52 pages)
- PCM-6308V+ (4 pages)
- PCI-7444 (82 pages)
- PCI-7434 (48 pages)
- PCI-7234 (56 pages)
- PCI-7260 (66 pages)
- PCI-7258 (38 pages)
- PCI-7256 (48 pages)
- PCI-7250 (48 pages)
- LPCI-7250 (48 pages)
- PCI-7396 (65 pages)
- PCI-7296 (59 pages)
- PCI-8554 (67 pages)
- PCIe-7360 (94 pages)
- PCIe-7350 (86 pages)
- PCIe-7300A (114 pages)
- PCIe-7200 (51 pages)
- PCI-7300A (112 pages)
- PCI-7300A (83 pages)
- PCI-7200 (96 pages)
- cPCI-7300 (82 pages)
- cPCI-7300 (83 pages)