ADLINK PCI-9820 User Manual

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• Operation Theory

Once choosing the timebase source, users can set a 24-bit counter to divide
the timebase to get the needed sampling rate. The following formula deter-
mines the ADC sampling frequency:

Sampling Rate = Timebase Frequency / ADC Clock Divisor

where the ADC Clock Divisor = 1,2,3,4,5… 2

-1(maximum)

For more information about SSI timebase, please refer to section 4.5

4.2.1

External sine wave clock source

Users can supply the timebase from external SMB connector CLK IN, which
should be a sine wave signal. This signal is AC coupled with 50Ω input im-
pedance and the valid input level is from 1 to 2 volts peak-to -peak. Note that
the external clock must be continuous for correct ADC operation because of
the pipeline architecture of the ADC.

4.2.2

130MS/s Sampling using Ping-Pong Mode

The PCI-9820 uses two A/D converters, each running at 60MS/s, to provide a
dual-channel simultaneous real-time sampling rate of 60MS/s. (65MS/s with
external timebase)

For the single-channel acquisition, the two ADCs can be clocked in a
“ping-pong” mode to achieve up to 120MS/s sampling (130MS/s with external
timebase). Note that only CH0 can be applied to ping-pong mode operation.

The onboard auto-calibration circuitry allows the two channels to be matched
in order to reduce the image signal.

4.3 Trigger

Modes

The PCI-9820 provides 4 trigger sources (internal software trigger, external
analog trigger, external digital trigger, and SSI trigger signals). Users must
select one of them as the source of the trigger event. A trigger event occurs
when the specified condition is detected on the selected trigger source (For
example, a rising edge on the external digital trigger input). Please refer to
section 4.4 for more information about trigger sources.

There are 4 trigger modes (pre-trigger, post-trigger, middle-trigger, and de-
lay-trigger) working with the 4 trigger sources to initiate different data acqui-
sition timing when a trigger event occurs. They are described as follows.

4.3.1 Post-trigger

Acquisition