ADLINK PCI-9820 - Manual (Page 36)

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• Operation Theory
Figure 4.9 External digital trigger input
T
w
TRG IO
T
w
= 2 - 3 TIMEBASE clocks
Figure 4.10 TRG IO output signal timing
4.5 Data Transfers
Since the maximum data throughput on the PCI-9820 (60MS/s * 2 channels *
2 Bytes/channel = 240MB/s) is much higher than the 32bit/33MHz PCI-bus
bandwidth, samples are acquired into the onboard SDRAM memory before
being transferred to the host computer. Since the number of stored samples
per acquisition is limited by the amount of on-board memory, the PCI-9820
supports different sizes of SODIMM SDRAM ranging from 64MB to 512MB in
order to meet application requirements.
Once all the data has been stored in the on-board memory, the data will be
transferred to the host computer’s memory through bus-mastering DMA.
In a multi-user or multi-tasking OS, like Microsoft Windows, Linux, and so on,
it is difficult to allocate a large continuous memory block to do the DMA
transfer. Therefore, the PCI-9820 provides the function of scatter /gather
DMA to link the non-continuous memory blocks into a linked list so that users
can transfer very large amounts of data without being limited by the fragment
of small size memory, as illustrated in Fig 4.11.
If the data throughput from the PCI-9820 is less than the available PCI
bandwidth (For example: 20MS/s * 2 channels * 2 Bytes/channel = 80MB/s),