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Switching waveforms – Cypress CY7C09079V User Manual

Page 12

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CY7C09079V/89V/99V

CY7C09179V/89V/99V

Document #: 38-06043 Rev. *C

Page 12 of 21

Figure 11. Pipelined Read-to-Write-to-Read (OE Controlled)

[19, 26, 27, 28]

Notes

26. Output state (HIGH, LOW, or high-impedance) is determined by the previous cycle control signals.
27. CE

0

and ADS = V

IL

; CE

1

, CNTEN, and CNTRST = V

IH

.

28. During “No Operation”, data in memory at the selected address may be corrupted and should be re-written to ensure data integrity.

Switching Waveforms

(continued)

t

CYC2

t

CL2

t

CH2

t

HC

t

SC

t

HW

t

SW

t

HA

t

SA

A

n

A

n+1

A

n+2

A

n+3

A

n+4

A

n+5

t

HW

t

SW

t

SD

t

HD

D

n+2

t

CD2

t

OHZ

READ

READ

WRITE

D

n+3

t

CKLZ

t

CD2

Q

n

Q

n+4

CLK

CE

0

CE

1

R/W

ADDRESS

DATA

IN

DATA

OUT

OE

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