Maxim Integrated 73M1866B/73M1966B Implementers Guide - Manual (Page 25)

UG_1x66B_016 73M1866B/73M1966B Implementer’s Guide
Rev. 1.3 25
6.2 PCLKDT Interrupt
The triggering of the PCLKDT interrupt indicates that the device has detected a PCLK error. When found,
it can be assumed that there is a problem with the PCLK. If the error is temporary, the error can be
cleared by resetting the PLL. If the error is due to an external clock failure this error will not clear.
0x05 ENGPIO7 ENGPIO6 ENGPIO5 ENPCLKDT ENAPOL ENDET ENSYNL ENRGDT
Write X X X 1 1 X X X
Set the ENPCLKDT bit in Register 0x05 to enable the PCLKDT interrupt.
Begin
1. If PCLKDT =1 (IntSrc = xxx1_xxxx) then goto PLL Recovery Process (see Section 3.1.2 PCLK Clock
Recovery and PLL Lock Detection ).
End
6.3 DET Interrupt
The triggering of the DET interrupt indicates that the device has detected one of several line condition
errors. When found, it can be assumed that there is a problem with the line status. The general
corrective action is for the line side device to go on hook. These interrupts are only valid when the device
is in an off-hook condition.
0x05 ENGPIO7 ENGPIO6 ENGPIO5 ENPCLKDT ENAPOL ENDET ENSYNL ENRGDT
Write X X X X 1 1 X X
0x12 OFH ENDC ENAC ENSHL ENLVD ENFEL ENDT ENNOM
Write 1 1 1 x x 1 1 x
0x13 DCIV1 DCIV0 ILM RSVD PLDM OVDTH IDISPD Res
Write X X 0 0 0 1/0 0 0
0x14 TXBST DAA1 DAA0 Res RXBST RLPNH RXG1 RXG0
Write X X X 0 X X X X
0x15 ENOLD DISNTR Res CIDM THEN ENUVD ENOVD ENOID
Write 1 0 0 0 1 1 1 1
0x1E ILMON UVDET OVDET OIDET OLDET SLLS Res Res
Read X ? ? ? ? X X X
Set the ENDET bit in Register 0x05 to enable the DET interrupt.
Begin
1. If DET = 1 (IntSrc = xxxx_x1xx).
2. Read RG1E
3. If OVDET = 1, report condition to user and put device on hook.
4. If OIDET = 1, report condition to user and put device on hook.
5. If OLDET = 1, report condition to user and put device on hook.
6. If UVDET = 1, report condition to user and put device on hook.
End