Cypress CY62157EV18 - Manual (Page 2)

CY62157EV18 MoBL
®
Document #: 38-05490 Rev. *D Page 2 of 12
Logic Block Diagram
Pin Configuration [3]
512K x 16
RAM Array IO
0
–IO
7
RO
W DE
CO
DE
R
A
8
A
7
A
6
A
5
A
2
COLUMN DECODER
A
11
A
12
A
13
A
14
A
15
SE
NS
E AMP
S
DATA IN DRIVERS
OE
A
4
A
3
IO
8
–IO
15
WE
BLE
BHE
A
16
A
0
A
1
A
17
A
9
BHE
BLE
A
10
A
18
POWER DOWN
CIRCUIT CE
2
CE
1
CE
2
CE
1
Note
3. NC pins are not connected on the die.
WE
A
11
A
10
A
6
A
0
A
3
CE
1
IO
10
IO
8
IO
9
A
4
A
5
IO
11
IO
13
IO
12
IO
14
IO
15
V
SS
A
9
A
8
OE
A
7
IO
0
BHE
CE
2
A
17
A
2
A
1 BLE
IO
2
IO
1
IO
3
IO
4
IO
5
IO
6
IO
7
A
15
A
14
A
13
A
12
NC
A
18
NC
3 2 6 5 4 1
D
E
B
A
C
F
G
H
A
16
NC
V
CC
V
CC
V
SS
48-ball VFBGA
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