Cypress STK12C68-5 - Manual (Page 11)

STK12C68-5 (SMD5962-94599)
Document Number: 001-51026 Rev. ** Page 11 of 18
AutoStore or Power Up RECALL
Parameter Alt Description
STK12C68-5
Unit
Min Max
t
HRECALL
[13] t
RESTORE
Power up RECALL Duration 550
μs
t
STORE
[14, 15, 16] t
HLHZ
STORE Cycle Duration 10 ms
t
DELAY
[9, 15] t
HLQZ ,
t
BLQZ
Time Allowed to Complete SRAM Cycle 1
μs
V
SWITCH
Low Voltage Trigger Level 4.0 4.5 V
V
RESET
Low Voltage Reset Level 3.9 V
t
VCCRISE
V
CC
Rise Time 150
μs
t
VSBL
[11] Low Voltage Trigger (V
SWITCH
) to HSB Low 300 ns
Switching Waveform
Figure 12. AutoStore/Power Up RECALL
WE
Notes
13. t
HRECALL
starts from the time V
CC
rises above V
SWITCH
.
14. CE and OE low for output behavior.
15. CE and OE low and WE high for output behavior.
16. HSB is asserted low for 1us when V
CAP
drops through V
SWITCH
. If an SRAM Write has not taken place since the last nonvolatile cycle, HSB is released and no store
takes place.
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