Kontron PB-TIM2 - Manual (Page 12)

Chapter 2 Functional Description PB-TIM2 User’s Manual
2.1 Normal Timer Mode
With reference to the single channel block diagram of figure 2.1.0 below, the input line (A) is used as a trigger, input
line (B) functions as a gate that disables the timer when active and the third input (C) may be used as a clear input. An
additional clear input is common to all three timers. The output line acts as either non-zero detection or as a toggle
function on zero detection.
Figure 2.1.0 Block diagram of a single channel
Last Value
8-bit
Prescaler
16-bit
Timer Register
16-bit Compare /
Preset Register
16-bit
Comparator
Toggle
Logic
Logic
Logic
Logic
OUTPUT
B
C
A
Common
Clear
Compare Value
16 MHz
Sys Clk
Load
Count Enable
Reset
Q0 - Q15
D0 - D15
Zero
Detector
Zero
Logic
16-bit Last
Value Register
Logic
Logic
Logic
Clock
Match IRQ
Divide by
4 Logic
4 MHz
Timer Clk
Page 2-2 © 1996 PEP Modular Computers July 30, 1997